Copyright (C) 1995-2020 FinalWire Ltd. All rights reserved. aida_bench64.dll build: 4.5.827.15 Jul 15 2020 09:27:42 GALAXYBOOK Arch:X64 CPUCount:5 NUMA:0 Freq: 1382.40MHz Priority:080 OS:6.3.18363 Memory: 8183276KB AllocGran:0x00010000 P:0x00001000 LP:0x0000000000200000 Memory To Test:16384KB 4K DTLB:512 2M DTLB: 32 CLFlush:64 ProcMask: 0x000000000000001f Features: X86,TSC,X87,CMOV,MMX,SSE,SSE2,SSE3,AMD64,SSSE3,SSE4.1,SSE4.2,POPCNT,LAHF,CMPX8,CMPX16,AESNI,CLMUL,MOVBE,RDRAND,FSGSBASE,CLFLUSH,TSCINV,RDTSCP,3DNOWPREF,LNOP,ERMS,PSE,RDSEED,SMAP,PT,SHA,CLFLUSHOPT,CLWB,UMIP,RDPID,GFNI,HYBRID, CPU#000 Vendor: GenuineIntel Family: 6 Model: 8a Stepping: 1 CoreType:0x200806a1 CPU#000 Type: "Intel(R) Core(TM) i5-L16G7 CPU @ 1.40GHz" CPU#000 AffMask: 0x0000000000000001 CPU#000 PhysMask:0x000000000000001f CPU#000 APIC_ID:0x00000000 Phys_ID:000 Core_ID:00 SMT_ID:00 CPU#000 L1I cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000001 CPU#000 L1D cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000001 CPU#000 L2 cache: 1536KB, 64 byte cache line, 12 way, SMask:000000000000000f CPU#000 L3 cache: 4096KB, 64 byte cache line, 16 way, SMask:000000000000001f CPU#000 L1D 4K TLB: 48 entries, full, SMask:0000000000000001 CPU#000 L1I 4K TLB: 48 entries, full, SMask:0000000000000001 CPU#000 L2I+D 4K TLB: 1024 entries, 4 way, SMask:0000000000000001 CPU#000 L2I+D 2M TLB: 64 entries, 4 way, SMask:0000000000000001 CPU#001 Vendor: GenuineIntel Family: 6 Model: 8a Stepping: 1 CoreType:0x200806a1 CPU#001 Type: "Intel(R) Core(TM) i5-L16G7 CPU @ 1.40GHz" CPU#001 AffMask: 0x0000000000000002 CPU#001 PhysMask:0x000000000000001f CPU#001 APIC_ID:0x00000002 Phys_ID:000 Core_ID:01 SMT_ID:00 CPU#001 L1I cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000002 CPU#001 L1D cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000002 CPU#001 L2 cache: 1536KB, 64 byte cache line, 12 way, SMask:000000000000000f CPU#001 L3 cache: 4096KB, 64 byte cache line, 16 way, SMask:000000000000001f CPU#001 L1D 4K TLB: 48 entries, full, SMask:0000000000000002 CPU#001 L1I 4K TLB: 48 entries, full, SMask:0000000000000002 CPU#001 L2I+D 4K TLB: 1024 entries, 4 way, SMask:0000000000000002 CPU#001 L2I+D 2M TLB: 64 entries, 4 way, SMask:0000000000000002 CPU#002 Vendor: GenuineIntel Family: 6 Model: 8a Stepping: 1 CoreType:0x200806a1 CPU#002 Type: "Intel(R) Core(TM) i5-L16G7 CPU @ 1.40GHz" CPU#002 AffMask: 0x0000000000000004 CPU#002 PhysMask:0x000000000000001f CPU#002 APIC_ID:0x00000004 Phys_ID:000 Core_ID:02 SMT_ID:00 CPU#002 L1I cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000004 CPU#002 L1D cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000004 CPU#002 L2 cache: 1536KB, 64 byte cache line, 12 way, SMask:000000000000000f CPU#002 L3 cache: 4096KB, 64 byte cache line, 16 way, SMask:000000000000001f CPU#002 L1D 4K TLB: 48 entries, full, SMask:0000000000000004 CPU#002 L1I 4K TLB: 48 entries, full, SMask:0000000000000004 CPU#002 L2I+D 4K TLB: 1024 entries, 4 way, SMask:0000000000000004 CPU#002 L2I+D 2M TLB: 64 entries, 4 way, SMask:0000000000000004 CPU#003 Vendor: GenuineIntel Family: 6 Model: 8a Stepping: 1 CoreType:0x200806a1 CPU#003 Type: "Intel(R) Core(TM) i5-L16G7 CPU @ 1.40GHz" CPU#003 AffMask: 0x0000000000000008 CPU#003 PhysMask:0x000000000000001f CPU#003 APIC_ID:0x00000006 Phys_ID:000 Core_ID:03 SMT_ID:00 CPU#003 L1I cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000008 CPU#003 L1D cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000008 CPU#003 L2 cache: 1536KB, 64 byte cache line, 12 way, SMask:000000000000000f CPU#003 L3 cache: 4096KB, 64 byte cache line, 16 way, SMask:000000000000001f CPU#003 L1D 4K TLB: 48 entries, full, SMask:0000000000000008 CPU#003 L1I 4K TLB: 48 entries, full, SMask:0000000000000008 CPU#003 L2I+D 4K TLB: 1024 entries, 4 way, SMask:0000000000000008 CPU#003 L2I+D 2M TLB: 64 entries, 4 way, SMask:0000000000000008 CPU#004 Vendor: GenuineIntel Family: 6 Model: 8a Stepping: 1 CoreType:0xb00806a1 CPU#004 Type: "Intel(R) Core(TM) i5-L16G7 CPU @ 1.40GHz" CPU#004 AffMask: 0x0000000000000010 CPU#004 PhysMask:0x000000000000001f CPU#004 APIC_ID:0x00000008 Phys_ID:000 Core_ID:04 SMT_ID:00 CPU#004 L1I cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000010 CPU#004 L1D cache: 48KB, 64 byte cache line, 12 way, SMask:0000000000000010 CPU#004 L2 cache: 512KB, 64 byte cache line, 8 way, SMask:0000000000000010 CPU#004 L3 cache: 4096KB, 64 byte cache line, 16 way, SMask:000000000000001f CPU#004 L1I 4K TLB: 128 entries, 8 way, SMask:0000000000000010 CPU#004 L1I 2M TLB: 16 entries, 8 way, SMask:0000000000000010 CPU#004 L2I+D 4K TLB: 1024 entries, 8 way, SMask:0000000000000010 CPU#004 L1D 4K TLB(loads): 64 entries, 4 way, SMask:0000000000000010 CPU#004 L1D 2M TLB(loads): 32 entries, 4 way, SMask:0000000000000010 CPU#004 L1D 4K+2M TLB(stores): 16 entries, full, SMask:0000000000000010 CPU#004 L2I+D 4K+2M TLB: 1024 entries, 8 way, SMask:0000000000000010 --tscratio=2.17 Instruction Latency: Used CPUs: 1 ProcMask: 0x0000000000000010 0 X86 :NOP L: [no true dep.] T: 0.36ns= 0.50c 1 X86 :0x66 NOP L: [no true dep.] T: 0.04ns= 0.05c 2 X86 : 2x 0x66 NOP L: [no true dep.] T: 0.04ns= 0.05c 3 X86 : 3x 0x66 NOP L: [no true dep.] T: 0.64ns= 0.88c 4 X86 : 4x 0x66 NOP L: [no true dep.] T: 0.35ns= 0.49c 5 X86 : 5x 0x66 NOP L: [no true dep.] T: 0.32ns= 0.45c 6 X86 : 6x 0x66 NOP L: [no true dep.] T: 0.45ns= 0.62c 7 X86 : 7x 0x66 NOP L: [no true dep.] T: 0.38ns= 0.53c 8 X86 : 8x 0x66 NOP L: [no true dep.] T: 0.41ns= 0.56c 9 X86 : 9x 0x66 NOP L: [no true dep.] T: 1.00ns= 1.38c 10 X86 :10x 0x66 NOP L: [no true dep.] T: 0.04ns= 0.06c 11 X86 :11x 0x66 NOP L: [no true dep.] T: 0.40ns= 0.55c 12 X86 :12x 0x66 NOP L: [no true dep.] T: 0.81ns= 1.12c 13 X86 :13x 0x66 NOP L: [no true dep.] T: 0.74ns= 1.02c 14 X86 :14x 0x66 NOP L: [no true dep.] T: 1.00ns= 1.38c 15 SSE2 :PAUSE L: [no true dep.] T: 100.20ns=138.52c 16 X86 :MOV r8, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 17 X86 :MOV r16, imm16 L: 0.79ns= 1.1c T: 0.79ns= 1.09c 18 X86 :MOV r32, imm32 L: 0.18ns= 0.2c T: 0.05ns= 0.07c 19 AMD64 :MOV r64, imm64 L: 0.45ns= 0.6c T: 0.45ns= 0.62c 20 X86 :MOV r8, r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 21 X86 :MOV r16, r16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 22 X86 :MOV r32, r32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 23 AMD64 :MOV r64, r64 L: 0.73ns= 1.0c T: 0.10ns= 0.14c 24 X86 :MOV r8, [m8] L: 4.32ns= 6.0c T: 1.83ns= 2.53c 25 X86 :MOV r16, [m16] L: 4.32ns= 6.0c T: 0.36ns= 0.50c 26 X86 :MOV r32, [m32] L: 3.66ns= 5.1c T: 0.36ns= 0.50c 27 AMD64 :MOV r64, [m64] L: 3.66ns= 5.1c T: 0.36ns= 0.50c 28 X86 :MOV [m8], r8 L: [memory dep.] T: 0.36ns= 0.50c 29 X86 :MOV [m16], r16 L: [memory dep.] T: 0.36ns= 0.50c 30 X86 :MOV [m32], r32 L: [memory dep.] T: 0.36ns= 0.50c 31 X86 :MOV [m32 + 8], r32 L: [memory dep.] T: 0.36ns= 0.50c 32 AMD64 :MOV [m64], r64 L: [memory dep.] T: 0.36ns= 0.50c 33 AMD64 :MOV [m64 + 16], r64 L: [memory dep.] T: 0.73ns= 1.00c 34 X86 :MOV r8,[m8]+MOV [m8],r8 L: 0.72ns= 1.0c T: 3.14ns= 4.34c 35 X86 :MOV r16,[m16]+MOV [m16],r16 L: 8.63ns= 11.9c T: 0.54ns= 0.75c 36 X86 :MOV r32,[m32]+MOV [m32],r32 L: 0.38ns= 0.5c T: 0.98ns= 1.36c 37 AMD64 :MOV r64,[m64]+MOV [m64],r64 L: 0.39ns= 0.5c T: 0.82ns= 1.13c 38 SSE2 :MOVNTI [m32], r32 L: [memory dep.] T: 1.14ns= 1.14c 39 AMD64 :MOVNTI [m64], r64 L: [memory dep.] T: 1.18ns= 1.18c 40 CMOV :CMOVNZ r16, r16 L: 0.73ns= 1.0c T: 0.41ns= 0.56c 41 CMOV :CMOVNZ r32, r32 L: 0.73ns= 1.0c T: 0.39ns= 0.53c 42 AMD64 :CMOVNZ r64, r64 L: 0.73ns= 1.0c T: 0.60ns= 0.84c 43 X86 :MOVSX r16, r8 L: 0.73ns= 1.0c T: 0.59ns= 0.82c 44 X86 :MOVSX r32, r8 L: 0.71ns= 1.0c T: 0.19ns= 0.27c 45 AMD64 :MOVSX r64, r8 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 46 X86 :MOVSX r32, r16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 47 AMD64 :MOVSX r64, r16 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 48 AMD64 :MOVSXD r64, r32 L: 0.71ns= 1.0c T: 0.15ns= 0.21c 49 X86 :MOVZX r16, r8 L: 0.73ns= 1.0c T: 0.59ns= 0.82c 50 X86 :MOVZX r32, r8 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 51 AMD64 :MOVZX r64, r8 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 52 X86 :MOVZX r32, r16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 53 AMD64 :MOVZX r64, r16 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 54 X86 :XCHG r8, r8 L: 1.44ns= 2.0c T: 0.54ns= 0.75c 55 X86 :XCHG r16, r16 L: 1.44ns= 2.0c T: 0.72ns= 0.99c 56 X86 :XCHG r32, r32 L: 1.44ns= 2.0c T: 0.72ns= 0.99c 57 AMD64 :XCHG r64, r64 L: 1.44ns= 2.0c T: 0.72ns= 1.00c 58 X86 :XCHG r1_8, r2_8 L: 2.88ns= 4.0c T: 1.57ns= 2.17c 59 X86 :XCHG r1_16, r2_16 L: 1.11ns= 1.5c T: 0.72ns= 1.00c 60 X86 :XCHG r1_32, r2_32 L: 1.11ns= 1.5c T: 0.72ns= 1.00c 61 AMD64 :XCHG r1_64, r2_64 L: 1.11ns= 1.5c T: 0.73ns= 1.00c 62 X86 :XCHG r8, [m8] L: 14.52ns= 20.1c T: 13.08ns= 18.08c 63 X86 :XCHG r16, [m16] L: 14.52ns= 20.1c T: 13.08ns= 18.08c 64 X86 :XCHG r32, [m32] L: 14.52ns= 20.1c T: 13.08ns= 18.08c 65 AMD64 :XCHG r64, [m64] L: 14.52ns= 20.1c T: 13.08ns= 18.08c 66 X86 :ADD r32, 0x04000 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 67 X86 :ADD r32, 0x08000 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 68 X86 :ADD r32, 0x10000 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 69 X86 :ADD r32, 0x20000 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 70 X86 :ADD r8, r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 71 X86 :ADD r16, r16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 72 X86 :ADD r32, r32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 73 AMD64 :ADD r64, r64 L: 0.71ns= 1.0c T: 0.12ns= 0.16c 74 X86 :ADD r8, [m8] L: 4.32ns= 6.0c T: 1.08ns= 1.49c 75 X86 :ADD r16, [m16] L: 4.32ns= 6.0c T: 0.36ns= 0.50c 76 X86 :ADD r32, [m32] L: 4.32ns= 6.0c T: 0.36ns= 0.50c 77 AMD64 :ADD r64, [m64] L: 4.32ns= 6.0c T: 0.36ns= 0.50c 78 X86 :ADD [m8], r8 L: 5.49ns= 7.6c T: 0.36ns= 0.50c 79 X86 :ADD [m16], r16 L: 5.49ns= 7.6c T: 0.75ns= 1.03c 80 X86 :ADD [m32], r32 L: 5.49ns= 7.6c T: 0.73ns= 1.00c 81 X86 :ADD [m32 + 8], r32 L: 5.49ns= 7.6c T: 0.73ns= 1.00c 82 AMD64 :ADD [m64], r64 L: 5.49ns= 7.6c T: 0.58ns= 0.80c 83 AMD64 :ADD [m64 + 16], r64 L: 5.49ns= 7.6c T: 0.67ns= 0.92c 84 X86 :LOCK ADD [m8], r8 L: 14.52ns= 20.1c T: 14.13ns= 19.53c 85 X86 :LOCK ADD [m16], r16 L: 14.52ns= 20.1c T: 13.08ns= 18.08c 86 X86 :LOCK ADD [m32], r32 L: 14.52ns= 20.1c T: 13.08ns= 18.08c 87 X86 :LOCK ADD [m32 + 8], r32 L: 14.52ns= 20.1c T: 13.08ns= 18.08c 88 AMD64 :LOCK ADD [m64], r64 L: 14.52ns= 20.1c T: 13.08ns= 18.08c 89 AMD64 :LOCK ADD [m64 + 16], r64 L: 14.52ns= 20.1c T: 13.08ns= 18.08c 90 X86 :ADD r8, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 91 X86 :ADD r16, imm8 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 92 X86 :ADD r32, imm8 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 93 AMD64 :ADD r64, imm8 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 94 X86 :ADD r16, imm16 L: 2.35ns= 3.3c T: 2.35ns= 3.25c 95 X86 :ADD r32, imm32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 96 AMD64 :ADD r64, imm32 L: 0.73ns= 1.0c T: 0.33ns= 0.46c 97 X86 :ADD [m8], imm8 L: 5.49ns= 7.6c T: 0.74ns= 1.02c 98 X86 :ADD [m16], imm8 L: 5.49ns= 7.6c T: 0.71ns= 0.98c 99 X86 :ADD [m32], imm8 L: 5.49ns= 7.6c T: 0.70ns= 0.97c 100 AMD64 :ADD [m64], imm8 L: 5.49ns= 7.6c T: 0.71ns= 0.98c 101 X86 :ADD [m16], imm16 L: 5.49ns= 7.6c T: 2.35ns= 3.25c 102 X86 :ADD [m32], imm32 L: 5.49ns= 7.6c T: 0.73ns= 1.00c 103 AMD64 :ADD [m64], imm32 L: 5.49ns= 7.6c T: 0.66ns= 0.92c 104 X86 :ADD al, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 105 X86 :ADD ax, imm16 L: 2.35ns= 3.3c T: 2.35ns= 3.25c 106 X86 :ADD eax, imm32 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 107 AMD64 :ADD rax, imm32 L: 0.71ns= 1.0c T: 0.73ns= 1.00c 108 X86 :SUB r8, r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 109 X86 :SUB r16, r16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 110 X86 :SUB r32, r32 L: 0.14ns= 0.2c T: 0.04ns= 0.05c 111 AMD64 :SUB r64, r64 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 112 X86 :SUB r1_8, r2_8 L: 0.73ns= 1.0c T: 0.64ns= 0.88c 113 X86 :SUB r1_16, r2_16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 114 X86 :SUB r1_32, r2_32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 115 AMD64 :SUB r1_64, r2_64 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 116 X86 :ADC r8, r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 117 X86 :ADC r16, r16 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 118 X86 :ADC r32, r32 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 119 AMD64 :ADC r64, r64 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 120 X86 :SBB r8, r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 121 X86 :SBB r16, r16 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 122 X86 :SBB r32, r32 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 123 AMD64 :SBB r64, r64 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 124 X86 :SBB r1_8, r2_8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 125 X86 :SBB r1_16, r2_16 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 126 X86 :SBB r1_32, r2_32 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 127 AMD64 :SBB r1_64, r2_64 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 128 X86 :CMP r8, r8 L: [no true dep.] T: 0.05ns= 0.07c 129 X86 :CMP r16, r16 L: [no true dep.] T: 0.05ns= 0.07c 130 X86 :CMP r32, r32 L: [no true dep.] T: 0.05ns= 0.07c 131 AMD64 :CMP r64, r64 L: [no true dep.] T: 0.04ns= 0.06c 132 X86 :CMP r1_8, r2_8 L: [no true dep.] T: 0.05ns= 0.07c 133 X86 :CMP r1_16, r2_16 L: [no true dep.] T: 0.05ns= 0.07c 134 X86 :CMP r1_32, r2_32 L: [no true dep.] T: 0.05ns= 0.07c 135 AMD64 :CMP r1_64, r2_64 L: [no true dep.] T: 0.03ns= 0.04c 136 X86 :AND r8, r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 137 X86 :AND r16, r16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 138 X86 :AND r32, r32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 139 AMD64 :AND r64, r64 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 140 X86 :AND r1_8, r2_8 L: 0.73ns= 1.0c T: 0.63ns= 0.88c 141 X86 :AND r1_16, r2_16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 142 X86 :AND r1_32, r2_32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 143 AMD64 :AND r1_64, r2_64 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 144 X86 :OR r8, r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 145 X86 :OR r16, r16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 146 X86 :OR r32, r32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 147 AMD64 :OR r64, r64 L: 0.73ns= 1.0c T: 0.15ns= 0.21c 148 X86 :OR r1_8, r2_8 L: 0.73ns= 1.0c T: 0.64ns= 0.88c 149 X86 :OR r1_16, r2_16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 150 X86 :OR r1_32, r2_32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 151 AMD64 :OR r1_64, r2_64 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 152 X86 :XOR r8, r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 153 X86 :XOR r16, r16 L: 0.71ns= 1.0c T: 0.19ns= 0.26c 154 X86 :XOR r32, r32 L: 0.14ns= 0.2c T: 0.04ns= 0.05c 155 AMD64 :XOR r64, r64 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 156 X86 :XOR r1_8, r2_8 L: 0.73ns= 1.0c T: 0.64ns= 0.88c 157 X86 :XOR r1_16, r2_16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 158 X86 :XOR r1_32, r2_32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 159 AMD64 :XOR r1_64, r2_64 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 160 X86 :NEG r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 161 X86 :NEG r16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 162 X86 :NEG r32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 163 AMD64 :NEG r64 L: 0.71ns= 1.0c T: 0.12ns= 0.16c 164 X86 :NOT r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 165 X86 :NOT r16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 166 X86 :NOT r32 L: 0.71ns= 1.0c T: 0.19ns= 0.27c 167 AMD64 :NOT r64 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 168 X86 :TEST r8, r8 L: [no true dep.] T: 0.47ns= 0.65c 169 X86 :TEST r16, r16 L: [no true dep.] T: 0.05ns= 0.07c 170 X86 :TEST r32, r32 L: [no true dep.] T: 0.05ns= 0.07c 171 AMD64 :TEST r64, r64 L: [no true dep.] T: 0.03ns= 0.04c 172 X86 :TEST r1_8, r2_8 L: [no true dep.] T: 0.05ns= 0.07c 173 X86 :TEST r1_16, r2_16 L: [no true dep.] T: 0.05ns= 0.07c 174 X86 :TEST r1_32, r2_32 L: [no true dep.] T: 0.05ns= 0.07c 175 AMD64 :TEST r1_64, r2_64 L: [no true dep.] T: 0.86ns= 1.19c 176 X86 :BT r16, r16 L: [no true dep.] T: 0.37ns= 0.51c 177 X86 :BT r32, r32 L: [no true dep.] T: 0.39ns= 0.54c 178 AMD64 :BT r64, r64 L: [no true dep.] T: 0.74ns= 1.03c 179 X86 :BT r16, imm8 L: [no true dep.] T: 0.42ns= 0.59c 180 X86 :BT r32, imm8 L: [no true dep.] T: 0.41ns= 0.56c 181 AMD64 :BT r64, imm8 L: [no true dep.] T: 0.70ns= 0.97c 182 X86 :BTC r16, r16 L: 0.73ns= 1.0c T: 0.39ns= 0.54c 183 X86 :BTC r32, r32 L: 0.73ns= 1.0c T: 0.39ns= 0.54c 184 AMD64 :BTC r64, r64 L: 0.73ns= 1.0c T: 0.70ns= 0.96c 185 X86 :BTC r16, imm8 L: 0.73ns= 1.0c T: 0.43ns= 0.60c 186 X86 :BTC r32, imm8 L: 0.73ns= 1.0c T: 0.40ns= 0.55c 187 AMD64 :BTC r64, imm8 L: 0.73ns= 1.0c T: 0.70ns= 0.97c 188 X86 :BTR r16, r16 L: 0.73ns= 1.0c T: 0.42ns= 0.58c 189 X86 :BTR r32, r32 L: 0.73ns= 1.0c T: 0.39ns= 0.54c 190 AMD64 :BTR r64, r64 L: 0.73ns= 1.0c T: 0.66ns= 0.91c 191 X86 :BTR r16, imm8 L: 0.73ns= 1.0c T: 0.42ns= 0.58c 192 X86 :BTR r32, imm8 L: 0.73ns= 1.0c T: 0.39ns= 0.54c 193 AMD64 :BTR r64, imm8 L: 0.73ns= 1.0c T: 0.72ns= 0.99c 194 X86 :BTS r16, r16 L: 0.73ns= 1.0c T: 0.39ns= 0.53c 195 X86 :BTS r32, r32 L: 0.73ns= 1.0c T: 0.39ns= 0.54c 196 AMD64 :BTS r64, r64 L: 0.73ns= 1.0c T: 0.69ns= 0.95c 197 X86 :BTS r16, imm8 L: 0.73ns= 1.0c T: 0.43ns= 0.59c 198 X86 :BTS r32, imm8 L: 0.73ns= 1.0c T: 0.44ns= 0.61c 199 AMD64 :BTS r64, imm8 L: 0.73ns= 1.0c T: 0.70ns= 0.97c 200 X86 :SETC r8 L: 0.73ns= 1.0c T: 0.41ns= 0.57c 201 X86 :INC r8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 202 X86 :INC r16 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 203 X86 :INC r32 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 204 AMD64 :INC r64 L: 0.73ns= 1.0c T: 0.12ns= 0.17c 205 AMD64 :LEA r16, [r64 + r64] L: 1.44ns= 2.0c T: 0.74ns= 1.02c 206 AMD64 :LEA r32, [r64 + r64] L: 0.73ns= 1.0c T: 0.31ns= 0.43c 207 AMD64 :LEA r64, [r64 + r64] L: 0.73ns= 1.0c T: 0.13ns= 0.18c 208 AMD64 :LEA r16, [r64 + r64 + disp8] L: 1.44ns= 2.0c T: 0.70ns= 0.97c 209 AMD64 :LEA r32, [r64 + r64 + disp8] L: 0.73ns= 1.0c T: 0.13ns= 0.18c 210 AMD64 :LEA r64, [r64 + r64 + disp8] L: 0.73ns= 1.0c T: 0.13ns= 0.18c 211 AMD64 :LEA r16, [r64 + r64 * 8] L: 1.44ns= 2.0c T: 0.72ns= 1.00c 212 AMD64 :LEA r32, [r64 + r64 * 8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 213 AMD64 :LEA r64, [r64 + r64 * 8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 214 AMD64 :LEA r16, [r64 + r64 * 8 + disp8] L: 1.44ns= 2.0c T: 0.73ns= 1.00c 215 AMD64 :LEA r32, [r64 + r64 * 8 + disp8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 216 AMD64 :LEA r64, [r64 + r64 * 8 + disp8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 217 X86 :SHL r8, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.49c 218 X86 :SHL r16, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 219 X86 :SHL r32, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 220 AMD64 :SHL r64, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 221 X86 :SHL r8, imm8 L: 0.73ns= 1.0c T: 0.35ns= 0.49c 222 X86 :SHL r16, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 223 X86 :SHL r32, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 224 AMD64 :SHL r64, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 225 X86 :SHL r8, cl L: 0.81ns= 1.1c T: 0.81ns= 1.12c 226 X86 :SHL r16, cl L: 0.81ns= 1.1c T: 0.73ns= 1.00c 227 X86 :SHL r32, cl L: 0.81ns= 1.1c T: 0.73ns= 1.00c 228 AMD64 :SHL r64, cl L: 0.81ns= 1.1c T: 0.73ns= 1.00c 229 X86 :SHR r8, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.49c 230 X86 :SHR r16, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 231 X86 :SHR r32, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 232 AMD64 :SHR r64, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 233 X86 :SHR r8, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.49c 234 X86 :SHR r16, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 235 X86 :SHR r32, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 236 AMD64 :SHR r64, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 237 X86 :SHR r8, cl L: 0.81ns= 1.1c T: 0.81ns= 1.12c 238 X86 :SHR r16, cl L: 0.80ns= 1.1c T: 0.73ns= 1.00c 239 X86 :SHR r32, cl L: 0.83ns= 1.1c T: 0.73ns= 1.00c 240 AMD64 :SHR r64, cl L: 0.80ns= 1.1c T: 0.73ns= 1.00c 241 X86 :SAR r8, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.49c 242 X86 :SAR r16, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 243 X86 :SAR r32, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 244 AMD64 :SAR r64, 1 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 245 X86 :SAR r8, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.49c 246 X86 :SAR r16, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 247 X86 :SAR r32, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 248 AMD64 :SAR r64, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 249 X86 :SAR r8, cl L: 0.81ns= 1.1c T: 0.81ns= 1.12c 250 X86 :SAR r16, cl L: 0.81ns= 1.1c T: 0.73ns= 1.00c 251 X86 :SAR r32, cl L: 0.81ns= 1.1c T: 0.73ns= 1.00c 252 AMD64 :SAR r64, cl L: 0.81ns= 1.1c T: 0.73ns= 1.00c 253 X86 :SHLD r1_16, r1_16, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 254 X86 :SHLD r1_32, r1_32, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 255 AMD64 :SHLD r1_64, r1_64, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 256 X86 :SHLD r1_16, r1_16, cl L: 3.14ns= 4.3c T: 0.85ns= 1.18c 257 X86 :SHLD r1_32, r1_32, cl L: 3.14ns= 4.3c T: 0.79ns= 1.09c 258 AMD64 :SHLD r1_64, r1_64, cl L: 3.14ns= 4.3c T: 0.73ns= 1.00c 259 X86 :SHRD r1_16, r1_16, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 260 X86 :SHRD r1_32, r1_32, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 261 AMD64 :SHRD r1_64, r1_64, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 262 X86 :SHRD r1_16, r1_16, cl L: 3.14ns= 4.3c T: 0.87ns= 1.20c 263 X86 :SHRD r1_32, r1_32, cl L: 3.14ns= 4.3c T: 0.73ns= 1.00c 264 AMD64 :SHRD r1_64, r1_64, cl L: 3.14ns= 4.3c T: 0.73ns= 1.00c 265 X86 :ROL r8, 1 L: 0.81ns= 1.1c T: 0.73ns= 1.00c 266 X86 :ROL r16, 1 L: 0.81ns= 1.1c T: 0.73ns= 1.00c 267 X86 :ROL r32, 1 L: 0.81ns= 1.1c T: 0.73ns= 1.00c 268 AMD64 :ROL r64, 1 L: 0.82ns= 1.1c T: 0.73ns= 1.00c 269 X86 :ROL r8, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.49c 270 X86 :ROL r16, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 271 X86 :ROL r32, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 272 AMD64 :ROL r64, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 273 X86 :ROL r8, cl L: 0.81ns= 1.1c T: 0.81ns= 1.12c 274 X86 :ROL r16, cl L: 0.81ns= 1.1c T: 0.73ns= 1.00c 275 X86 :ROL r32, cl L: 0.81ns= 1.1c T: 0.73ns= 1.00c 276 AMD64 :ROL r64, cl L: 0.83ns= 1.1c T: 0.73ns= 1.00c 277 X86 :ROR r8, 1 L: 0.81ns= 1.1c T: 0.73ns= 1.00c 278 X86 :ROR r16, 1 L: 0.81ns= 1.1c T: 0.73ns= 1.00c 279 X86 :ROR r32, 1 L: 0.81ns= 1.1c T: 0.73ns= 1.00c 280 AMD64 :ROR r64, 1 L: 0.81ns= 1.1c T: 0.73ns= 1.00c 281 X86 :ROR r8, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.49c 282 X86 :ROR r16, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 283 X86 :ROR r32, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 284 AMD64 :ROR r64, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 285 X86 :ROR r8, cl L: 0.81ns= 1.1c T: 0.81ns= 1.12c 286 X86 :ROR r16, cl L: 0.83ns= 1.1c T: 0.73ns= 1.00c 287 X86 :ROR r32, cl L: 0.81ns= 1.1c T: 0.73ns= 1.00c 288 AMD64 :ROR r64, cl L: 0.81ns= 1.1c T: 0.73ns= 1.00c 289 X86 :RCL r8, 1 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 290 X86 :RCL r16, 1 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 291 X86 :RCL r32, 1 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 292 AMD64 :RCL r64, 1 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 293 X86 :RCL r8, imm8 L: 4.84ns= 6.7c T: 4.58ns= 6.33c 294 X86 :RCL r16, imm8 L: 5.10ns= 7.1c T: 5.10ns= 7.05c 295 X86 :RCL r32, imm8 L: 5.10ns= 7.1c T: 5.10ns= 7.05c 296 AMD64 :RCL r64, imm8 L: 5.10ns= 7.1c T: 5.10ns= 7.05c 297 X86 :RCL r8, cl L: 4.84ns= 6.7c T: 4.84ns= 6.69c 298 X86 :RCL r16, cl L: 5.10ns= 7.1c T: 5.10ns= 7.05c 299 X86 :RCL r32, cl L: 5.10ns= 7.1c T: 5.10ns= 7.05c 300 AMD64 :RCL r64, cl L: 5.10ns= 7.1c T: 5.10ns= 7.05c 301 X86 :RCR r8, 1 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 302 X86 :RCR r16, 1 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 303 X86 :RCR r32, 1 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 304 AMD64 :RCR r64, 1 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 305 X86 :RCR r8, imm8 L: 5.89ns= 8.1c T: 4.71ns= 6.51c 306 X86 :RCR r16, imm8 L: 4.32ns= 6.0c T: 4.32ns= 5.97c 307 X86 :RCR r32, imm8 L: 4.32ns= 6.0c T: 4.32ns= 5.97c 308 AMD64 :RCR r64, imm8 L: 4.32ns= 6.0c T: 4.32ns= 5.97c 309 X86 :RCR r8, cl L: 5.89ns= 8.1c T: 4.71ns= 6.51c 310 X86 :RCR r16, cl L: 4.32ns= 6.0c T: 4.32ns= 5.97c 311 X86 :RCR r32, cl L: 4.32ns= 6.0c T: 4.32ns= 5.97c 312 AMD64 :RCR r64, cl L: 4.32ns= 6.0c T: 4.32ns= 5.97c 313 X86 :BSF r16, r16 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 314 X86 :BSF r32, r32 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 315 AMD64 :BSF r64, r64 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 316 X86 :BSR r16, r16 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 317 X86 :BSR r32, r32 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 318 AMD64 :BSR r64, r64 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 319 X86 :BSWAP r32 L: 0.73ns= 1.0c T: 0.40ns= 0.55c 320 AMD64 :BSWAP r64 L: 1.44ns= 2.0c T: 0.75ns= 1.03c 321 MOVBE :MOVBE r16, [m16] L: 5.10ns= 7.1c T: 0.76ns= 1.04c 322 MOVBE :MOVBE r32, [m32] L: 4.32ns= 6.0c T: 0.73ns= 1.00c 323 MOVBE :MOVBE r64, [m64] L: 5.10ns= 7.1c T: 0.74ns= 1.02c 324 MOVBE :MOVBE [m16], r16 L: [memory dep.] T: 0.67ns= 0.93c 325 MOVBE :MOVBE [m32], r32 L: [memory dep.] T: 0.72ns= 1.00c 326 MOVBE :MOVBE [m64], r64 L: [memory dep.] T: 0.74ns= 1.02c 327 X86 :IMUL r16, r16 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 328 X86 :IMUL r32, r32 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 329 AMD64 :IMUL r64, r64 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 330 X86 :IMUL r16, r16, imm8 L: 2.88ns= 4.0c T: 0.73ns= 1.00c 331 X86 :IMUL r32, r32, imm8 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 332 AMD64 :IMUL r64, r64, imm8 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 333 X86 :IMUL r16, r16, imm16 L: 2.88ns= 4.0c T: 2.49ns= 3.44c 334 X86 :IMUL r32, r32, imm32 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 335 AMD64 :IMUL r64, r64, imm32 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 336 X86 :IMUL r8 (ah) L: 2.88ns= 4.0c T: 2.22ns= 3.07c 337 X86 :IMUL r16 (dx) L: 3.66ns= 5.1c T: 3.01ns= 4.16c 338 X86 :IMUL r32 (edx) L: 3.14ns= 4.3c T: 3.14ns= 4.34c 339 AMD64 :IMUL r64 (rdx) L: 2.88ns= 4.0c T: 2.22ns= 3.07c 340 X86 :MUL r8 (ah) L: 2.88ns= 4.0c T: 2.22ns= 3.07c 341 X86 :MUL r16 (dx) L: 3.66ns= 5.1c T: 3.01ns= 4.16c 342 X86 :MUL r32 (edx) L: 3.14ns= 4.3c T: 3.14ns= 4.34c 343 AMD64 :MUL r64 (rdx) L: 2.88ns= 4.0c T: 2.22ns= 3.07c 344 X86 :IMUL r8 (al) L: 2.22ns= 3.1c T: 2.22ns= 3.07c 345 X86 :IMUL r16 (ax) L: 3.01ns= 4.2c T: 3.01ns= 4.16c 346 X86 :IMUL r32 (eax) L: 3.14ns= 4.3c T: 3.14ns= 4.34c 347 AMD64 :IMUL r64 (rax) L: 2.22ns= 3.1c T: 2.22ns= 3.07c 348 X86 :MUL r8 (al) L: 2.22ns= 3.1c T: 2.22ns= 3.07c 349 X86 :MUL r16 (ax) L: 2.88ns= 4.0c T: 2.88ns= 3.98c 350 X86 :MUL r32 (eax) L: 3.14ns= 4.3c T: 3.14ns= 4.34c 351 AMD64 :MUL r64 (rax) L: 2.22ns= 3.1c T: 2.22ns= 3.07c 352 X86 :IDIV r8 14/ 7b (full) L: 10.86ns= 15.0c T: 10.86ns= 15.01c 353 X86 :IDIV r8 12/ 7b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 354 X86 :IDIV r8 7/ 7b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 355 X86 :IDIV r8 4/ 7b ax upd L: [no true dep.] T: 13.08ns= 18.08c 356 X86 :IDIV r8 0/ 7b L: [no true dep.] T: 10.46ns= 14.47c 357 X86 :IDIV r8 11/ 4b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 358 X86 :IDIV r8 8/ 4b ax upd L: [no true dep.] T: 13.08ns= 18.08c 359 X86 :IDIV r8 4/ 4b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 360 X86 :IDIV r8 0/ 4b L: [no true dep.] T: 12.30ns= 17.00c 361 X86 :IDIV r8 2^12/2^6 ax upd L: [no true dep.] T: 13.08ns= 18.08c 362 X86 :IDIV r8 1/1 L: 10.86ns= 15.0c T: 10.86ns= 15.01c 363 X86 :IDIV r8 1/1 ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 364 X86 :IDIV r16 30/15b (full) L: 11.64ns= 16.1c T: 11.64ns= 16.09c 365 X86 :IDIV r16 24/15b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 366 X86 :IDIV r16 15/15b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 367 X86 :IDIV r16 8/15b ax/dx upd L: [no true dep.] T: 12.30ns= 17.00c 368 X86 :IDIV r16 0/15b L: [no true dep.] T: 11.64ns= 16.09c 369 X86 :IDIV r16 23/ 8b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 370 X86 :IDIV r16 16/ 8b ax upd L: [no true dep.] T: 11.64ns= 16.09c 371 X86 :IDIV r16 8/ 8b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 372 X86 :IDIV r16 0/ 8b L: [no true dep.] T: 11.64ns= 16.09c 373 X86 :IDIV r16 2^28/2^14 ax/dx L: [no true dep.] T: 12.30ns= 17.00c 374 X86 :IDIV r16 1/1 L: 11.64ns= 16.1c T: 11.64ns= 16.09c 375 X86 :IDIV r16 1/1 ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 376 X86 :IDIV r16 1/1 ax/dx upd L: 12.30ns= 17.0c T: 12.30ns= 17.00c 377 X86 :IDIV r32 62/31b (full) L: 10.86ns= 15.0c T: 10.86ns= 15.01c 378 X86 :IDIV r32 62/31b 0 rem. L: 10.86ns= 15.0c T: 10.86ns= 15.01c 379 X86 :IDIV r32 48/31b eax upd L: 10.86ns= 15.0c T: 10.86ns= 15.01c 380 X86 :IDIV r32 31/31b eax upd L: 10.86ns= 15.0c T: 10.86ns= 15.01c 381 X86 :IDIV r32 16/31b eax/edx L: [no true dep.] T: 4.32ns= 5.97c 382 X86 :IDIV r32 0/31b L: [no true dep.] T: 10.86ns= 15.01c 383 X86 :IDIV r32 47/16b eax upd L: 10.86ns= 15.0c T: 10.86ns= 15.01c 384 X86 :IDIV r32 32/16b eax upd L: [no true dep.] T: 10.86ns= 15.01c 385 X86 :IDIV r32 16/16b eax upd L: 10.86ns= 15.0c T: 10.86ns= 15.01c 386 X86 :IDIV r32 0/16b L: [no true dep.] T: 10.86ns= 15.01c 387 X86 :IDIV r32 2^60/2^30 eax/edx L: [no true dep.] T: 4.32ns= 5.97c 388 X86 :IDIV r32 1/1 L: 10.86ns= 15.0c T: 10.86ns= 15.01c 389 X86 :IDIV r32 1/1 eax upd L: 10.86ns= 15.0c T: 10.86ns= 15.01c 390 X86 :IDIV r32 1/1 eax/edx upd L: 4.32ns= 6.0c T: 4.32ns= 5.97c 391 AMD64 :IDIV r64 126/63b (full) L: 13.08ns= 18.1c T: 13.08ns= 18.08c 392 AMD64 :IDIV r64 126/63b 0 rem. L: 13.08ns= 18.1c T: 13.08ns= 18.08c 393 AMD64 :IDIV r64 96/63b rax upd L: 13.08ns= 18.1c T: 13.08ns= 18.08c 394 AMD64 :IDIV r64 63/63b rax upd L: 13.08ns= 18.1c T: 13.08ns= 18.08c 395 AMD64 :IDIV r64 32/63b rax/rdx L: [no true dep.] T: 7.19ns= 9.95c 396 AMD64 :IDIV r64 0/63b L: [no true dep.] T: 13.08ns= 18.08c 397 AMD64 :IDIV r64 95/32b rax upd L: 13.08ns= 18.1c T: 13.08ns= 18.08c 398 AMD64 :IDIV r64 64/32b rax upd L: [no true dep.] T: 13.08ns= 18.08c 399 AMD64 :IDIV r64 32/32b rax upd L: 13.08ns= 18.1c T: 13.08ns= 18.08c 400 AMD64 :IDIV r64 0/32b L: [no true dep.] T: 13.08ns= 18.08c 401 AMD64 :IDIV r64 2^124/2^62 rax/rdx L: [no true dep.] T: 7.19ns= 9.95c 402 AMD64 :IDIV r64 1/1 L: 13.08ns= 18.1c T: 13.08ns= 18.08c 403 AMD64 :IDIV r64 1/1 rax upd L: 13.08ns= 18.1c T: 13.08ns= 18.08c 404 AMD64 :IDIV r64 1/1 rax/rdx upd L: 7.19ns= 9.9c T: 7.19ns= 9.95c 405 X86 :DIV r8 16/ 8b (full) L: 10.86ns= 15.0c T: 10.86ns= 15.01c 406 X86 :DIV r8 12/ 8b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 407 X86 :DIV r8 8/ 8b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 408 X86 :DIV r8 4/ 8b ax upd L: [no true dep.] T: 13.08ns= 18.08c 409 X86 :DIV r8 0/ 8b L: [no true dep.] T: 12.30ns= 17.00c 410 X86 :DIV r8 12/ 4b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 411 X86 :DIV r8 8/ 4b ax upd L: [no true dep.] T: 13.08ns= 18.08c 412 X86 :DIV r8 4/ 4b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 413 X86 :DIV r8 0/ 4b L: [no true dep.] T: 12.30ns= 17.00c 414 X86 :DIV r8 2^14/2^7 ax upd L: [no true dep.] T: 13.08ns= 18.08c 415 X86 :DIV r8 1/1 L: 10.86ns= 15.0c T: 10.86ns= 15.01c 416 X86 :DIV r8 1/1 ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 417 X86 :DIV r16 32/16b (full) L: 11.64ns= 16.1c T: 11.64ns= 16.09c 418 X86 :DIV r16 30/15b 0 rem. L: 11.64ns= 16.1c T: 11.64ns= 16.09c 419 X86 :DIV r16 24/16b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 420 X86 :DIV r16 16/16b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 421 X86 :DIV r16 8/16b ax/dx upd L: [no true dep.] T: 12.30ns= 17.00c 422 X86 :DIV r16 0/16b L: [no true dep.] T: 11.64ns= 16.09c 423 X86 :DIV r16 24/ 8b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 424 X86 :DIV r16 16/ 8b ax upd L: [no true dep.] T: 11.64ns= 16.09c 425 X86 :DIV r16 8/ 8b ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 426 X86 :DIV r16 0/ 8b L: [no true dep.] T: 11.64ns= 16.09c 427 X86 :DIV r16 1/1 L: 11.64ns= 16.1c T: 11.64ns= 16.09c 428 X86 :DIV r16 1/1 ax upd L: 11.64ns= 16.1c T: 11.64ns= 16.09c 429 X86 :DIV r16 1/1 ax/dx upd L: 12.30ns= 17.0c T: 12.30ns= 17.00c 430 X86 :DIV r32 64/32b (full) L: 10.86ns= 15.0c T: 10.86ns= 15.01c 431 X86 :DIV r32 62/31b 0 rem. L: 10.86ns= 15.0c T: 10.86ns= 15.01c 432 X86 :DIV r32 48/32b eax upd L: 10.86ns= 15.0c T: 10.86ns= 15.01c 433 X86 :DIV r32 32/32b eax upd L: 10.86ns= 15.0c T: 10.86ns= 15.01c 434 X86 :DIV r32 16/32b eax/edx L: [no true dep.] T: 4.32ns= 5.97c 435 X86 :DIV r32 0/32b L: [no true dep.] T: 10.86ns= 15.01c 436 X86 :DIV r32 48/16b eax upd L: 10.86ns= 15.0c T: 10.86ns= 15.01c 437 X86 :DIV r32 32/16b eax upd L: [no true dep.] T: 10.86ns= 15.01c 438 X86 :DIV r32 16/16b eax upd L: 10.86ns= 15.0c T: 10.86ns= 15.01c 439 X86 :DIV r32 0/16b L: [no true dep.] T: 10.86ns= 15.01c 440 X86 :DIV r32 2^62/2^31 eax/edx L: [no true dep.] T: 4.32ns= 5.97c 441 X86 :DIV r32 1/1 L: 10.86ns= 15.0c T: 10.86ns= 15.01c 442 X86 :DIV r32 1/1 eax upd L: 10.86ns= 15.0c T: 10.86ns= 15.01c 443 X86 :DIV r32 1/1 eax/edx upd L: 4.32ns= 6.0c T: 4.32ns= 5.97c 444 AMD64 :DIV r64 128/64b (full) L: 13.08ns= 18.1c T: 13.08ns= 18.08c 445 AMD64 :DIV r64 126/63b 0 rem. L: 13.08ns= 18.1c T: 13.08ns= 18.08c 446 AMD64 :DIV r64 96/64b rax upd L: 13.08ns= 18.1c T: 13.08ns= 18.08c 447 AMD64 :DIV r64 64/64b rax upd L: 13.08ns= 18.1c T: 13.08ns= 18.08c 448 AMD64 :DIV r64 32/64b rax/rdx L: [no true dep.] T: 7.19ns= 9.95c 449 AMD64 :DIV r64 0/64b L: [no true dep.] T: 13.08ns= 18.08c 450 AMD64 :DIV r64 96/32b rax upd L: 13.08ns= 18.1c T: 13.08ns= 18.08c 451 AMD64 :DIV r64 64/32b rax upd L: [no true dep.] T: 13.08ns= 18.08c 452 AMD64 :DIV r64 32/32b rax upd L: 13.08ns= 18.1c T: 13.08ns= 18.08c 453 AMD64 :DIV r64 0/32b L: [no true dep.] T: 13.08ns= 18.08c 454 AMD64 :DIV r64 2^126/2^63 rax/rdx L: [no true dep.] T: 7.19ns= 9.95c 455 AMD64 :DIV r64 1/1 L: 13.08ns= 18.1c T: 13.08ns= 18.08c 456 AMD64 :DIV r64 1/1 rax upd L: 13.08ns= 18.1c T: 13.08ns= 18.08c 457 AMD64 :DIV r64 1/1 rax/rdx upd L: 7.19ns= 9.9c T: 7.19ns= 9.95c 458 X86 :CBW L: 0.73ns= 1.0c T: 0.73ns= 1.00c 459 X86 :CWDE L: 0.73ns= 1.0c T: 0.73ns= 1.00c 460 AMD64 :CDQE L: 0.73ns= 1.0c T: 0.73ns= 1.00c 461 X86 :CWD L: 0.73ns= 1.0c T: 0.73ns= 1.00c 462 X86 :CDQ L: 0.73ns= 1.0c T: 0.73ns= 1.01c 463 AMD64 :CQO L: 0.37ns= 0.5c T: 0.37ns= 0.51c 464 X86 :CLC L: 0.18ns= 0.3c T: 0.05ns= 0.07c 465 X86 :STC L: 0.18ns= 0.3c T: 0.05ns= 0.07c 466 X86 :CMC L: 0.57ns= 0.8c T: 0.57ns= 0.79c 467 X86 :CLD L: 3.66ns= 5.1c T: 3.66ns= 5.06c 468 X86 :STD L: 3.66ns= 5.1c T: 3.66ns= 5.06c 475 LAHF :LAHF L: 2.22ns= 3.1c T: 2.22ns= 3.07c 476 LAHF :SAHF L: 1.05ns= 1.5c T: 1.05ns= 1.46c 483 X86 :PUSH r16 L: [no true dep.] T: 0.36ns= 0.50c 484 X86 :POP r16 L: [no true dep.] T: 0.36ns= 0.50c 485 X86 :PUSH r16 + POP r16 L: 5.36ns= 7.4c T: 0.46ns= 0.63c 486 AMD64 :PUSH r64 L: [no true dep.] T: 0.36ns= 0.50c 487 AMD64 :POP r64 L: [no true dep.] T: 0.36ns= 0.50c 488 AMD64 :PUSH r64 + POP r64 L: 0.42ns= 0.6c T: 0.45ns= 0.62c 489 AMD64 :PUSH imm8 L: [no true dep.] T: 0.36ns= 0.50c 490 AMD64 :PUSH imm8 + POP r64 L: 0.42ns= 0.6c T: 0.42ns= 0.58c 491 AMD64 :PUSH imm32 L: [no true dep.] T: 0.36ns= 0.50c 492 AMD64 :PUSH imm32 + POP r64 L: 0.42ns= 0.6c T: 0.42ns= 0.58c 493 X86 :PUSH [m16] L: [no true dep.] T: 0.75ns= 1.03c 494 X86 :POP [m16] L: [no true dep.] T: 0.74ns= 1.02c 495 X86 :PUSH [m16] + POP [m16] L: 7.33ns= 10.1c T: 1.27ns= 1.76c 496 AMD64 :PUSH [m64] L: [no true dep.] T: 0.74ns= 1.02c 497 AMD64 :POP [m64] L: [no true dep.] T: 0.74ns= 1.03c 498 AMD64 :PUSH [m64] + POP [m64] L: 7.46ns= 10.3c T: 1.44ns= 1.99c 499 X86 :PUSHF L: [no true dep.] T: 0.73ns= 1.00c 501 X86 :PUSHF + POPF L: 17.40ns= 24.1c T: 17.40ns= 24.05c 502 AMD64 :PUSHFQ L: [no true dep.] T: 0.73ns= 1.00c 504 AMD64 :PUSHFQ + POPFQ L: 17.40ns= 24.1c T: 17.40ns= 24.05c 505 X86 :CMPSB L: 2.88ns= 4.0c T: 2.88ns= 3.98c 506 X86 :CMPSW L: 2.88ns= 4.0c T: 2.88ns= 3.98c 507 X86 :CMPSD L: 2.88ns= 4.0c T: 2.88ns= 3.98c 508 AMD64 :CMPSQ L: 2.88ns= 4.0c T: 2.88ns= 3.98c 509 X86 :REPE CMPSB BW in L1D: 1.00 B/c 1377MiB/s 510 X86 :REPE CMPSW BW in L1D: 1.99 B/c 2750MiB/s 511 X86 :REPE CMPSD BW in L1D: 3.96 B/c 5480MiB/s 512 AMD64 :REPE CMPSQ BW in L1D: 7.88 B/c 10889MiB/s 513 X86 :LODSB L: 0.88ns= 1.2c T: 0.88ns= 1.21c 514 X86 :LODSW L: 0.88ns= 1.2c T: 0.96ns= 1.33c 515 X86 :LODSD L: 0.73ns= 1.0c T: 0.73ns= 1.00c 516 AMD64 :LODSQ L: 0.73ns= 1.0c T: 0.73ns= 1.00c 517 X86 :REP LODSB BW in L1D: 0.50 B/c 689MiB/s 518 X86 :REP LODSW BW in L1D: 1.00 B/c 1377MiB/s 519 X86 :REP LODSD BW in L1D: 1.99 B/c 2750MiB/s 520 AMD64 :REP LODSQ BW in L1D: 3.97 B/c 5486MiB/s 521 X86 :STOSB L: 0.73ns= 1.0c T: 0.73ns= 1.00c 522 X86 :STOSW L: 0.73ns= 1.0c T: 0.73ns= 1.00c 523 X86 :STOSD L: 0.73ns= 1.0c T: 0.73ns= 1.00c 524 AMD64 :STOSQ L: 0.73ns= 1.0c T: 0.73ns= 1.00c 525 X86 :REP STOSB BW in L1D:45.76 B/c 63257MiB/s 526 X86 :REP STOSW BW in L1D:50.00 B/c 69122MiB/s 527 X86 :REP STOSD BW in L1D:62.66 B/c 86618MiB/s 528 AMD64 :REP STOSQ BW in L1D:62.40 B/c 86260MiB/s 529 X86 :MOVSB L: 2.88ns= 4.0c T: 2.88ns= 3.98c 530 X86 :MOVSW L: 2.88ns= 4.0c T: 2.88ns= 3.98c 531 X86 :MOVSD L: 2.88ns= 4.0c T: 2.88ns= 3.98c 532 AMD64 :MOVSQ L: 2.88ns= 4.0c T: 2.88ns= 3.98c 533 X86 :REP MOVSB BW in L1D:119.84 B/c 165674MiB/s 534 X86 :REP MOVSW BW in L1D:121.78 B/c 168346MiB/s 535 X86 :REP MOVSD BW in L1D:121.78 B/c 168346MiB/s 536 AMD64 :REP MOVSQ BW in L1D:121.78 B/c 168346MiB/s 537 X86 :SCASB L: 0.88ns= 1.2c T: 0.89ns= 1.22c 538 X86 :SCASW L: 0.88ns= 1.2c T: 0.90ns= 1.24c 539 X86 :SCASD L: 0.88ns= 1.2c T: 0.89ns= 1.23c 540 AMD64 :SCASQ L: 0.89ns= 1.2c T: 0.99ns= 1.36c 541 X86 :REPNE SCASB BW in L1D: 0.50 B/c 689MiB/s 542 X86 :REPNE SCASW BW in L1D: 1.00 B/c 1377MiB/s 543 X86 :REPNE SCASD BW in L1D: 1.99 B/c 2750MiB/s 544 AMD64 :REPNE SCASQ BW in L1D: 3.97 B/c 5482MiB/s 545 X86 :XADD r8, r8 L: 1.44ns= 2.0c T: 0.54ns= 0.75c 546 X86 :XADD r16, r16 L: 1.44ns= 2.0c T: 0.72ns= 0.99c 547 X86 :XADD r32, r32 L: 1.44ns= 2.0c T: 0.72ns= 0.99c 548 AMD64 :XADD r64, r64 L: 1.44ns= 2.0c T: 0.72ns= 1.00c 549 X86 :CMPXCHG r8, r8 L: 3.66ns= 5.1c T: 3.66ns= 5.06c 550 X86 :CMPXCHG r16, r16 L: 3.66ns= 5.1c T: 3.66ns= 5.06c 551 X86 :CMPXCHG r32, r32 L: 3.66ns= 5.1c T: 3.66ns= 5.06c 552 AMD64 :CMPXCHG r64, r64 L: 3.66ns= 5.1c T: 3.66ns= 5.06c 553 CMPX8 :CMPXCHG8B L: 7.98ns= 11.0c T: 7.98ns= 11.03c 554 CMPX16 :CMPXCHG16B L: 12.43ns= 17.2c T: 10.86ns= 15.01c 555 X86 :RDTSC L: [no true dep.] T: 19.62ns= 27.13c 556 X86 :CPUID (EAX = 0) L: 75.61ns=104.5c T: 75.61ns=104.52c 557 X86 :CPUID (EAX = 1) L: 155.53ns=215.0c T: 155.53ns=215.01c 558 POPCNT :POPCNT r16, r16 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 559 POPCNT :POPCNT r32, r32 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 560 POPCNT :POPCNT r64, r64 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 564 SSE4.2 :CRC32 r32, r8 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 565 SSE4.2 :CRC32 r32, r16 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 566 SSE4.2 :CRC32 r32, r32 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 567 SSE4.2 :CRC32 r64, r8 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 568 SSE4.2 :CRC32 r64, r16 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 569 X87 :FNOP L: [no true dep.] T: 0.40ns= 0.55c 570 X87 :FXCH st(i) L: 0.35ns= 0.5c T: 0.35ns= 0.49c 571 X87 :FCHS L: 0.73ns= 1.0c T: 0.73ns= 1.00c 572 X87 :FABS L: 0.73ns= 1.0c T: 0.73ns= 1.00c 573 X87 :FTST L: [no true dep.] T: 0.73ns= 1.00c 574 X87 :FXAM L: [no true dep.] T: 1.44ns= 1.99c 575 CMOV :FCMOVE st, st(i) L: 2.22ns= 3.1c T: 0.73ns= 1.00c 576 X87 :FADD st(i), st (st = 0.0) L: 2.22ns= 3.1c T: 0.73ns= 1.00c 577 X87 :FADD st(i), st L: 2.22ns= 3.1c T: 0.73ns= 1.00c 578 X87 :FADD st, st(i), FXCH st(i) L: 2.22ns= 3.1c T: 0.73ns= 1.00c 579 X87 :FMUL st(i), st (st = 0.0) L: 2.88ns= 4.0c T: 0.73ns= 1.00c 580 X87 :FMUL st(i), st L: 2.88ns= 4.0c T: 0.73ns= 1.00c 581 X87 :FMUL st, st(i), FXCH st(i) L: 2.88ns= 4.0c T: 0.73ns= 1.00c 582 X87 :FMUL + FADD st, st(i) L: 5.10ns= 7.1c T: [not enough reg] 583 X87 :FMUL st(2i) FADD st(2i+1) L: 2.88ns= 4.0c T: [not enough reg] 584 X87 :FDIV32 st(i), st L: 8.63ns= 11.9c T: 2.22ns= 3.07c 585 X87 :FDIV64 st(i), st L: 10.86ns= 15.0c T: 2.88ns= 3.98c 586 X87 :FDIV80 st(i), st L: 11.64ns= 16.1c T: 3.27ns= 4.52c 587 X87 :FDIV80 (0.0l/x) L: 10.20ns= 14.1c T: 3.27ns= 4.52c 588 X87 :FDIV80 (x/1.0l) L: 10.20ns= 14.1c T: 3.27ns= 4.52c 589 X87 :FDIV80 (x/2.0l) L: 10.20ns= 14.1c T: 3.27ns= 4.52c 590 X87 :FDIV80 (x/0.5l) L: 10.20ns= 14.1c T: 3.27ns= 4.52c 591 X87 :FSQRT32 st L: 9.42ns= 13.0c T: 1.83ns= 2.53c 592 X87 :FSQRT64 st L: 13.74ns= 19.0c T: 4.32ns= 5.97c 593 X87 :FSQRT80 st L: 15.17ns= 21.0c T: 5.10ns= 7.05c 594 X87 :FSQRT80 (0.0l) L: 10.20ns= 14.1c T: 3.27ns= 4.52c 595 X87 :FSQRT80 (1.0l) L: 10.20ns= 14.1c T: 3.27ns= 4.52c 596 X87 :FDECSTP L: [no true dep.] T: 0.40ns= 0.55c 597 X87 :FINCSTP L: [no true dep.] T: 0.40ns= 0.55c 598 X87 :FCOM st(i) L: [no true dep.] T: 0.73ns= 1.00c 599 CMOV :FCOMI st, st(i) L: [no true dep.] T: 0.73ns= 1.00c 600 X87 :FSIN80 (0.0) L: 42.64ns= 59.0c T: 43.30ns= 59.86c 601 X87 :FSIN80 (0.0) + FADD L: 43.30ns= 59.9c T: 43.43ns= 60.04c 602 X87 :FSIN80 (1.0) + FADD L: 95.75ns=132.4c T: 94.31ns=130.38c 603 X87 :FSIN80 (4Pi) + FADD L: 70.25ns= 97.1c T: 70.51ns= 97.47c 604 X87 :FSIN80 (2Pi) + FADD L: 70.25ns= 97.1c T: 70.51ns= 97.47c 605 X87 :FSIN80 (Pi) + FADD L: 70.25ns= 97.1c T: 70.51ns= 97.47c 606 X87 :FSIN80 (Pi/2) + FADD L: 85.94ns=118.8c T: 83.72ns=115.73c 607 X87 :FSIN80 (Pi/4) + FADD L: 95.75ns=132.4c T: 94.31ns=130.38c 608 X87 :FSIN80 (Pi/8) + FADD L: 81.89ns=113.2c T: 80.45ns=111.21c 609 X87 :FSIN80 (Pi/16) + FADD L: 70.25ns= 97.1c T: 70.51ns= 97.47c 610 X87 :FSIN80 (Pi/32) + FADD L: 70.25ns= 97.1c T: 70.51ns= 97.47c 611 X87 :FCOS80 (0.73908513...) L: 94.31ns=130.4c T: 94.31ns=130.38c 612 X87 :FCOS80 (0.73908513...)+FADD L: 95.75ns=132.4c T: 94.31ns=130.38c 613 X87 :FCOS80 (0.0) + FADD L: 41.73ns= 57.7c T: 41.86ns= 57.87c 614 X87 :FCOS80 (1.0) + FADD L: 81.10ns=112.1c T: 80.45ns=111.21c 615 X87 :FCOS80 (4Pi) + FADD L: 83.72ns=115.7c T: 82.54ns=114.11c 616 X87 :FCOS80 (2Pi) + FADD L: 83.72ns=115.7c T: 82.54ns=114.11c 617 X87 :FCOS80 (Pi) + FADD L: 83.72ns=115.7c T: 82.54ns=114.11c 618 X87 :FCOS80 (Pi/2) + FADD L: 70.90ns= 98.0c T: 69.59ns= 96.20c 619 X87 :FCOS80 (Pi/4) + FADD L: 81.89ns=113.2c T: 80.45ns=111.21c 620 X87 :FCOS80 (Pi/8) + FADD L: 95.75ns=132.4c T: 94.31ns=130.38c 621 X87 :FCOS80 (Pi/16) + FADD L: 83.72ns=115.7c T: 82.54ns=114.11c 622 X87 :FCOS80 (Pi/32) + FADD L: 83.72ns=115.7c T: 82.54ns=114.11c 623 MMX :EMMS L: 5.10ns= 7.1c T: 5.10ns= 7.05c 624 MMX :MOVD r32, mm L: [diff. reg. set] T: 0.73ns= 1.00c 625 MMX :MOVD mm, r32 L: [diff. reg. set] T: 0.73ns= 1.00c 626 MMX :MOVD r32, mm+MOVD mm, r32 L: 2.88ns= 4.0c T: 0.73ns= 1.00c 627 AMD64 :MOVD r64, mm L: [diff. reg. set] T: 0.73ns= 1.00c 628 AMD64 :MOVD mm, r64 L: [diff. reg. set] T: 0.73ns= 1.00c 629 AMD64 :MOVD r64, mm+MOVD mm, r64 L: 2.88ns= 4.0c T: 0.73ns= 1.00c 630 MMX :MOVD mm, [m32] L: [memory dep.] T: 0.36ns= 0.50c 631 MMX :MOVD [m32], mm L: [memory dep.] T: 0.36ns= 0.50c 632 MMX :MOVD mm,[m32]+MOVD [m32],mm L: 5.36ns= 7.4c T: 0.73ns= 1.00c 633 MMX :MOVQ mm, mm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 634 MMX :MOVQ mm, [m64] L: [memory dep.] T: 0.36ns= 0.50c 635 MMX :MOVQ [m64], mm L: [memory dep.] T: 0.36ns= 0.50c 636 MMX :MOVQ mm,[m64]+MOVQ [m64],mm L: 5.49ns= 7.6c T: 0.61ns= 0.84c 637 SSE :MOVNTQ [m64], mm L: [memory dep.] T: 1.10ns= 1.10c 638 SSE :PMOVMSKB r32, mm L: [diff. reg. set] T: 0.73ns= 1.00c 639 AMD64 :PMOVMSKB r64, mm L: [diff. reg. set] T: 0.73ns= 1.00c 640 SSE :MASKMOVQ mm, mm L: [memory dep.] T: 1.99ns= 1.99c 641 MMX :PADDB mm, mm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 642 MMX :PADDW mm, mm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 643 MMX :PADDD mm, mm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 644 SSE2 :PADDQ mm, mm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 645 MMX :PADDSB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 646 MMX :PADDSW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 647 MMX :PADDUSB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 648 MMX :PADDUSW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 649 MMX :PSUBB mm, mm L: 0.36ns= 0.5c T: 0.36ns= 0.50c 650 MMX :PSUBB mm1, mm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 651 MMX :PSUBW mm, mm L: 0.36ns= 0.5c T: 0.36ns= 0.50c 652 MMX :PSUBW mm1, mm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 653 MMX :PSUBD mm, mm L: 0.36ns= 0.5c T: 0.36ns= 0.50c 654 MMX :PSUBD mm1, mm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 655 SSE2 :PSUBQ mm, mm L: 0.36ns= 0.5c T: 0.36ns= 0.50c 656 SSE2 :PSUBQ mm1, mm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 657 MMX :PSUBSB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 658 MMX :PSUBSB mm1, mm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 659 MMX :PSUBSW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 660 MMX :PSUBSW mm1, mm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 661 MMX :PSUBUSB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 662 MMX :PSUBUSB mm1, mm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 663 MMX :PSUBUSW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 664 MMX :PSUBUSW mm1, mm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 665 MMX :PCMPEQB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 666 MMX :PCMPEQB mm1, mm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 667 MMX :PCMPEQW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 668 MMX :PCMPEQW mm1, mm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 669 MMX :PCMPEQD mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 670 MMX :PCMPEQD mm1, mm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 671 MMX :PCMPGTB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 672 MMX :PCMPGTB mm1, mm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 673 MMX :PCMPGTW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 674 MMX :PCMPGTW mm1, mm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 675 MMX :PCMPGTD mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 676 MMX :PCMPGTD mm1, mm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 677 MMX :PAND mm, mm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 678 MMX :PAND mm1, mm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 679 MMX :PANDN mm, mm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 680 MMX :PANDN mm1, mm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 681 MMX :POR mm, mm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 682 MMX :POR mm1, mm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 683 MMX :PXOR mm, mm L: 0.36ns= 0.5c T: 0.36ns= 0.50c 684 MMX :PXOR mm1, mm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 685 MMX :PMULHW mm, mm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 686 SSE :PMULHUW mm, mm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 688 SSSE3 :PMULHRSW mm, mm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 689 MMX :PMULLW mm, mm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 690 SSE2 :PMULUDQ mm, mm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 691 SSSE3 :PMADDUBSW mm, mm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 692 MMX :PMADDWD mm, mm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 693 MMX :PSLLW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 694 MMX :PSLLW mm, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 695 MMX :PSLLD mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 696 MMX :PSLLD mm, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 697 MMX :PSLLQ mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 698 MMX :PSLLQ mm, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 699 MMX :PSRAW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 700 MMX :PSRAW mm, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 701 MMX :PSRAD mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 702 MMX :PSRAD mm, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 703 MMX :PSRLW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 704 MMX :PSRLW mm, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 705 MMX :PSRLD mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 706 MMX :PSRLD mm, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 707 MMX :PSRLQ mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 708 MMX :PSRLQ mm, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 709 MMX :PUNPCKHBW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 710 MMX :PUNPCKHWD mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 711 MMX :PUNPCKHDQ mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 712 MMX :PUNPCKLBW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 713 MMX :PUNPCKLWD mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 714 MMX :PUNPCKLDQ mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 715 MMX :PACKSSWB mm, mm L: 2.88ns= 4.0c T: 1.44ns= 1.99c 716 MMX :PACKUSWB mm, mm L: 2.88ns= 4.0c T: 1.44ns= 1.99c 717 MMX :PACKSSDW mm, mm L: 2.88ns= 4.0c T: 1.44ns= 1.99c 746 3DNOWPREF :PREFETCHW [mem] L: [memory dep.] T: 0.73ns= 1.00c 753 SSE :PAVGB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 754 SSE :PAVGW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 755 SSE :PEXTRW r32, mm, im8 L: [diff. reg. set] T: 0.73ns= 1.00c 756 SSE :PINSRW mm, r32, im8 L: [diff. reg. set] T: 1.44ns= 1.99c 757 SSE :PEXTRW + PINSRW r32 L: 2.22ns= 3.1c T: 2.22ns= 3.07c 758 AMD64 :PEXTRW r64, mm, im8 L: [diff. reg. set] T: 0.73ns= 1.00c 759 AMD64 :PINSRW mm, r64, im8 L: [diff. reg. set] T: 1.57ns= 2.17c 760 AMD64 :PEXTRW + PINSRW r64 L: 2.22ns= 3.1c T: 2.22ns= 3.07c 761 SSE :PMAXSW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 762 SSE :PMAXUB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 763 SSE :PMINSW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 764 SSE :PMINUB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 765 SSE :PSADBW mm, mm L: 2.22ns= 3.1c T: 0.73ns= 1.00c 766 SSE :PSHUFW mm, mm, im8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 767 SSE :PREFETCHNTA [mem] L: [memory dep.] T: 0.38ns= 0.52c 768 SSE :PREFETCHT0 [mem] L: [memory dep.] T: 0.38ns= 0.52c 769 SSE :PREFETCHT1 [mem] L: [memory dep.] T: 0.42ns= 0.58c 770 SSE :PREFETCHT2 [mem] L: [memory dep.] T: 0.42ns= 0.58c 771 SSE :SFENCE L: 4.32ns= 6.0c T: 4.32ns= 5.97c 772 SSE2 :LFENCE L: 3.79ns= 5.2c T: 3.79ns= 5.24c 773 SSE2 :MFENCE L: 26.29ns= 36.3c T: 26.29ns= 36.35c 774 SSSE3 :PABSB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 775 SSSE3 :PABSW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 776 SSSE3 :PABSD mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 777 SSSE3 :PALIGNR mm, mm, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 778 SSSE3 :PHADDW mm, mm L: 2.22ns= 3.1c T: 1.44ns= 1.99c 779 SSSE3 :PHADDD mm, mm L: 2.22ns= 3.1c T: 1.44ns= 1.99c 780 SSSE3 :PHADDSW mm, mm L: 2.22ns= 3.1c T: 1.44ns= 1.99c 781 SSSE3 :PHSUBW mm, mm L: 2.22ns= 3.1c T: 1.44ns= 1.99c 782 SSSE3 :PHSUBD mm, mm L: 2.22ns= 3.1c T: 1.44ns= 1.99c 783 SSSE3 :PHSUBSW mm, mm L: 2.22ns= 3.1c T: 1.44ns= 1.99c 784 SSSE3 :PSHUFB mm, mm L: 2.22ns= 3.1c T: 0.73ns= 1.00c 785 SSSE3 :PSIGNB mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 786 SSSE3 :PSIGNW mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 787 SSSE3 :PSIGND mm, mm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 788 SSE :MOVHLPS xmm, xmm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 789 SSE :MOVHLPS xmm1, xmm2 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 792 SSE :MOVSS xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 794 SSE :MOVSS xmm, [m32] L: [memory dep.] T: 0.36ns= 0.50c 795 SSE :MOVSS [m32], xmm L: [memory dep.] T: 0.36ns= 0.50c 796 SSE :MOVSS LS pair L: 3.66ns= 5.1c T: 1.44ns= 1.99c 800 SSE :MOVLPS xmm, [m32] L: [memory dep.] T: 0.36ns= 0.50c 801 SSE :MOVLPS [m32], xmm L: [memory dep.] T: 0.36ns= 0.50c 802 SSE :MOVLPS LS pair L: 5.36ns= 7.4c T: 0.35ns= 0.49c 806 SSE :MOVHPS xmm, [m32] L: [memory dep.] T: 0.73ns= 1.00c 807 SSE :MOVHPS [m32], xmm L: [memory dep.] T: 0.36ns= 0.50c 808 SSE :MOVHPS LS pair L: 5.36ns= 7.4c T: 0.74ns= 1.02c 812 SSE :MOVAPS xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 813 SSE :MOVAPS xmm, [m128] L: [memory dep.] T: 0.36ns= 0.50c 814 SSE :MOVAPS [m128], xmm L: [memory dep.] T: 0.36ns= 0.50c 815 SSE :MOVAPS LS pair L: 3.66ns= 5.1c T: 1.44ns= 1.99c 820 SSE :MOVUPS xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 821 SSE :MOVUPS xmm, [m128] L: [memory dep.] T: 0.36ns= 0.50c 822 SSE :MOVUPS [m128], xmm L: [memory dep.] T: 0.36ns= 0.50c 823 SSE :MOVUPS aligned LS pair L: 3.66ns= 5.1c T: 2.09ns= 2.89c 824 SSE :MOVUPS xmm, [m128 + 4] L: [memory dep.] T: 0.48ns= 0.67c 825 SSE :MOVUPS [m128 + 4], xmm L: [memory dep.] T: 0.63ns= 0.88c 826 SSE :MOVUPS unaligned LS pair L: 3.66ns= 5.1c T: 1.22ns= 1.69c 835 SSE :MOVNTPS [m128], xmm L: [memory dep.] T: 1.14ns= 1.14c 837 SSE :MOVMSKPS r32, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 842 SSE :UNPCKLPS xmm, xmm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 844 SSE :UNPCKHPS xmm, xmm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 846 SSE :SHUFPS xmm, xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 850 SSE :COMISS xmm, xmm L: [no true dep.] T: 0.73ns= 1.00c 852 SSE :UCOMISS xmm, xmm L: [no true dep.] T: 0.73ns= 1.00c 854 SSE :CMPSS xmm, xmm, imm8 L: 2.88ns= 4.0c T: 0.78ns= 1.08c 855 SSE :CMPPS xmm, xmm, imm8 L: 2.88ns= 4.0c T: 0.78ns= 1.08c 858 SSE :SUBSS xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 860 SSE :SUBPS xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 862 SSE :ADDSS xmm, xmm L: 2.88ns= 4.0c T: 0.36ns= 0.50c 864 SSE :ADDPS xmm, xmm L: 2.88ns= 4.0c T: 0.36ns= 0.50c 866 SSE :MULSS xmm, xmm L: 2.88ns= 4.0c T: 0.36ns= 0.50c 868 SSE :MULPS xmm, xmm L: 2.88ns= 4.0c T: 0.36ns= 0.50c 870 SSE :MULSS+ADDSS xmm, xmm L: 5.76ns= 8.0c T: 0.63ns= 0.87c 872 SSE :MULPS+ADDPS xmm, xmm L: 5.76ns= 8.0c T: 0.59ns= 0.81c 874 SSE :MULSS xm1,xm1 ADDSS xm2,xm2 L: 2.88ns= 4.0c T: 0.73ns= 1.00c 876 SSE :MULPS xm1,xm1 ADDPS xm2,xm2 L: 2.88ns= 4.0c T: 0.73ns= 1.00c 878 SSE :MAXSS xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 880 SSE :MAXPS xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 882 SSE :MINSS xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 884 SSE :MINPS xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 886 SSE :ANDNPS xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 887 SSE :ANDNPS xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 890 SSE :ANDPS xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 891 SSE :ANDPS xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 894 SSE :ORPS xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 895 SSE :ORPS xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 898 SSE :XORPS xmm, xmm L: 0.19ns= 0.3c T: 0.19ns= 0.26c 899 SSE :XORPS xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 902 SSE :DIVSS xmm, xmm L: 7.98ns= 11.0c T: 2.22ns= 3.07c 903 SSE :DIVSS (0.0f/x) L: 7.98ns= 11.0c T: 2.22ns= 3.07c 904 SSE :DIVSS (x/1.0f) L: 7.98ns= 11.0c T: 2.22ns= 3.07c 905 SSE :DIVSS (x/2.0f) L: 7.06ns= 9.8c T: 2.22ns= 3.07c 906 SSE :DIVSS (x/0.5f) L: 7.06ns= 9.8c T: 2.22ns= 3.07c 912 SSE :DIVPS xmm, xmm L: 7.98ns= 11.0c T: 2.22ns= 3.07c 913 SSE :DIVPS (0.0f/x) L: 7.98ns= 11.0c T: 2.22ns= 3.07c 914 SSE :DIVPS (x/1.0f) L: 7.98ns= 11.0c T: 2.22ns= 3.07c 915 SSE :DIVPS (x/2.0f) L: 5.62ns= 7.8c T: 1.96ns= 2.71c 916 SSE :DIVPS (x/0.5f) L: 5.62ns= 7.8c T: 1.96ns= 2.71c 922 SSE :SQRTSS xmm, xmm L: 8.63ns= 11.9c T: 2.22ns= 3.07c 923 SSE :SQRTSS (0.0f) L: 8.63ns= 11.9c T: 2.22ns= 3.07c 924 SSE :SQRTSS (1.0f) L: 8.63ns= 11.9c T: 2.22ns= 3.07c 928 SSE :SQRTPS xmm, xmm L: 8.63ns= 11.9c T: 2.22ns= 3.07c 929 SSE :SQRTPS (0.0f) L: 8.63ns= 11.9c T: 2.22ns= 3.07c 930 SSE :SQRTPS (1.0f) L: 8.63ns= 11.9c T: 2.22ns= 3.07c 934 SSE :RCPSS xmm, xmm L: 2.88ns= 4.0c T: 0.73ns= 1.00c 936 SSE :RCPPS xmm, xmm L: 2.88ns= 4.0c T: 0.73ns= 1.00c 938 SSE :RSQRTSS xmm, xmm L: 2.88ns= 4.0c T: 0.73ns= 1.00c 940 SSE :RSQRTPS xmm, xmm L: 2.88ns= 4.0c T: 0.73ns= 1.00c 942 SSE :CVTPI2PS xmm, mm L: [diff. reg. set] T: 0.77ns= 1.07c 943 SSE :CVTPS2PI mm, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 944 SSE :CVTPS2PI + CVTPI2PS L: 9.42ns= 13.0c T: 1.44ns= 1.99c 945 SSE :CVTTPS2PI mm, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 946 SSE :CVTTPS2PI + CVTPI2PS L: 9.42ns= 13.0c T: 0.94ns= 1.30c 947 SSE :CVTSI2SS xmm, r32 L: [diff. reg. set] T: 0.73ns= 1.00c 948 SSE :CVTSS2SI r32, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 949 SSE :CVTSS2SI + CVTSI2SS r32 L: 8.63ns= 11.9c T: 0.56ns= 0.77c 950 SSE :CVTTSS2SI r32, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 951 SSE :CVTTSS2SI + CVTSI2SS r32 L: 8.63ns= 11.9c T: 0.56ns= 0.78c 957 AMD64 :CVTSI2SS xmm, r64 L: [diff. reg. set] T: 1.44ns= 1.99c 958 AMD64 :CVTSS2SI r64, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 959 AMD64 :CVTSS2SI + CVTSI2SS r64 L: 10.20ns= 14.1c T: 1.44ns= 1.99c 960 AMD64 :CVTTSS2SI r64, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 961 AMD64 :CVTTSS2SI + CVTSI2SS r64 L: 10.20ns= 14.1c T: 1.44ns= 1.99c 967 SSE :STMXCSR [mem] L: [memory dep.] T: 0.73ns= 1.00c 968 SSE :LDMXCSR [mem] L: [memory dep.] T: 2.49ns= 3.44c 969 SSE :STMXCSR + LDMXCSR L: 7.98ns= 11.0c T: 7.98ns= 11.03c 970 SSE2 :MOVSD xmm, xmm L: 0.71ns= 1.0c T: 0.19ns= 0.27c 971 SSE2 :MOVSD xmm, [m64] L: [memory dep.] T: 0.36ns= 0.50c 972 SSE2 :MOVSD [m64], xmm L: [memory dep.] T: 0.36ns= 0.50c 973 SSE2 :MOVSD LS pair L: 3.66ns= 5.1c T: 2.09ns= 2.89c 978 SSE2 :MOVLPD xmm, [m64] L: [memory dep.] T: 0.36ns= 0.50c 979 SSE2 :MOVLPD [m64], xmm L: [memory dep.] T: 0.36ns= 0.50c 980 SSE2 :MOVLPD LS pair L: 5.49ns= 7.6c T: 0.36ns= 0.50c 984 SSE2 :MOVHPD xmm, [m64] L: [memory dep.] T: 0.73ns= 1.00c 985 SSE2 :MOVHPD [m64], xmm L: [memory dep.] T: 0.36ns= 0.50c 986 SSE2 :MOVHPD LS pair L: 5.49ns= 7.6c T: 0.74ns= 1.03c 990 SSE2 :MOVAPD xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 991 SSE2 :MOVAPD xmm, [m128] L: [memory dep.] T: 0.36ns= 0.50c 992 SSE2 :MOVAPD [m128], xmm L: [memory dep.] T: 0.36ns= 0.50c 993 SSE2 :MOVAPD LS pair L: 3.66ns= 5.1c T: 1.44ns= 1.99c 998 SSE2 :MOVUPD xmm, xmm L: 0.71ns= 1.0c T: 0.19ns= 0.27c 999 SSE2 :MOVUPD xmm, [m128] L: [memory dep.] T: 0.36ns= 0.50c 1000 SSE2 :MOVUPD [m128], xmm L: [memory dep.] T: 0.36ns= 0.50c 1001 SSE2 :MOVUPD aligned LS pair L: 3.66ns= 5.1c T: 1.44ns= 1.99c 1002 SSE2 :MOVUPD xmm, [m128 + 4] L: [memory dep.] T: 0.73ns= 1.00c 1003 SSE2 :MOVUPD [m128 + 4], xmm L: [memory dep.] T: 0.60ns= 0.84c 1004 SSE2 :MOVUPD unaligned LS pair L: 3.66ns= 5.1c T: 1.24ns= 1.72c 1013 SSE2 :MOVNTPD [m128], xmm L: [memory dep.] T: 1.17ns= 1.17c 1015 SSE2 :MOVMSKPD r32, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1020 SSE2 :UNPCKLPD xmm, xmm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 1022 SSE2 :UNPCKHPD xmm, xmm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 1024 SSE2 :SHUFPD xmm, xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1028 SSE2 :COMISD xmm, xmm L: [no true dep.] T: 0.73ns= 1.00c 1030 SSE2 :UCOMISD xmm, xmm L: [no true dep.] T: 0.73ns= 1.00c 1032 SSE2 :CMPSD xmm, xmm, imm8 L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1033 SSE2 :CMPPD xmm, xmm, imm8 L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1036 SSE2 :SUBSD xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1038 SSE2 :SUBPD xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1040 SSE2 :ADDSD xmm, xmm L: 2.88ns= 4.0c T: 0.36ns= 0.50c 1042 SSE2 :ADDPD xmm, xmm L: 2.88ns= 4.0c T: 0.36ns= 0.50c 1044 SSE2 :MULSD xmm, xmm L: 2.88ns= 4.0c T: 0.36ns= 0.50c 1046 SSE2 :MULPD xmm, xmm L: 2.88ns= 4.0c T: 0.36ns= 0.50c 1048 SSE2 :MULSD+ADDSD xmm, xmm L: 5.76ns= 8.0c T: 0.61ns= 0.84c 1050 SSE2 :MULPD+ADDPD xmm, xmm L: 5.76ns= 8.0c T: 0.61ns= 0.84c 1052 SSE2 :MULSD xm1,xm1 ADDSD xm2,xm2 L: 2.88ns= 4.0c T: 0.73ns= 1.00c 1054 SSE2 :MULPD xm1,xm1 ADDPD xm2,xm2 L: 2.88ns= 4.0c T: 0.73ns= 1.00c 1056 SSE2 :MAXSD xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1058 SSE2 :MAXPD xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1060 SSE2 :MINSD xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1062 SSE2 :MINPD xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1064 SSE2 :ANDNPD xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1065 SSE2 :ANDNPD xmm1, xmm2 L: 0.73ns= 1.0c T: 0.40ns= 0.55c 1068 SSE2 :ANDPD xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1069 SSE2 :ANDPD xmm1, xmm2 L: 0.73ns= 1.0c T: 0.63ns= 0.87c 1072 SSE2 :ORPD xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1073 SSE2 :ORPD xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1076 SSE2 :XORPD xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1077 SSE2 :XORPD xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1080 SSE2 :DIVSD xmm, xmm L: 10.20ns= 14.1c T: 2.88ns= 3.98c 1081 SSE2 :DIVSD (0.0/x) L: 9.42ns= 13.0c T: 2.88ns= 3.98c 1082 SSE2 :DIVSD (x/1.0) L: 9.42ns= 13.0c T: 2.88ns= 3.98c 1083 SSE2 :DIVSD (x/2.0) L: 8.37ns= 11.6c T: 2.75ns= 3.80c 1084 SSE2 :DIVSD (x/0.5) L: 8.37ns= 11.6c T: 2.75ns= 3.80c 1090 SSE2 :DIVPD xmm, xmm L: 10.20ns= 14.1c T: 2.88ns= 3.98c 1091 SSE2 :DIVPD (0.0/x) L: 9.42ns= 13.0c T: 2.88ns= 3.98c 1092 SSE2 :DIVPD (x/1.0) L: 9.42ns= 13.0c T: 2.88ns= 3.98c 1093 SSE2 :DIVPD (x/2.0) L: 6.67ns= 9.2c T: 2.75ns= 3.80c 1094 SSE2 :DIVPD (x/0.5) L: 6.67ns= 9.2c T: 2.49ns= 3.44c 1100 SSE2 :SQRTSD xmm, xmm L: 13.08ns= 18.1c T: 4.32ns= 5.97c 1101 SSE2 :SQRTSD (0.0) L: 9.42ns= 13.0c T: 3.27ns= 4.52c 1102 SSE2 :SQRTSD (1.0) L: 9.42ns= 13.0c T: 3.27ns= 4.52c 1106 SSE2 :SQRTPD xmm, xmm L: 13.08ns= 18.1c T: 4.32ns= 5.97c 1107 SSE2 :SQRTPD (0.0) L: 9.42ns= 13.0c T: 3.27ns= 4.52c 1108 SSE2 :SQRTPD (1.0) L: 9.42ns= 13.0c T: 3.27ns= 4.52c 1112 SSE2 :CVTPI2PD xmm, mm L: [diff. reg. set] T: 0.73ns= 1.00c 1113 SSE2 :CVTPD2PI mm, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1114 SSE2 :CVTPD2PI + CVTPI2PD L: 7.19ns= 9.9c T: 1.26ns= 1.74c 1115 SSE2 :CVTTPD2PI mm, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1116 SSE2 :CVTTPD2PI + CVTPI2PD L: 7.19ns= 9.9c T: 1.26ns= 1.74c 1117 SSE2 :CVTSI2SD xmm, r32 L: [diff. reg. set] T: 0.73ns= 1.00c 1118 SSE2 :CVTSD2SI r32, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1119 SSE2 :CVTSD2SI + CVTSI2SD r32 L: 8.63ns= 11.9c T: 0.56ns= 0.77c 1120 SSE2 :CVTTSD2SI r32, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1121 SSE2 :CVTTSD2SI + CVTSI2SD r32 L: 8.63ns= 11.9c T: 0.56ns= 0.77c 1127 AMD64 :CVTSI2SD xmm, r64 L: [diff. reg. set] T: 0.73ns= 1.00c 1128 AMD64 :CVTSD2SI r64, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1129 AMD64 :CVTSD2SI + CVTSI2SD r64 L: 8.63ns= 11.9c T: 0.58ns= 0.80c 1130 AMD64 :CVTTSD2SI r64, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1131 AMD64 :CVTTSD2SI + CVTSI2SD r64 L: 8.63ns= 11.9c T: 0.58ns= 0.80c 1137 SSE2 :CVTDQ2PD xmm, xmm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 1138 SSE2 :CVTPD2DQ xmm, xmm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 1139 SSE2 :CVTPD2DQ + CVTDQ2PD L: 7.19ns= 9.9c T: 1.13ns= 1.56c 1140 SSE2 :CVTTPD2DQ xmm, xmm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 1141 SSE2 :CVTTPD2DQ + CVTDQ2PD L: 7.19ns= 9.9c T: 1.13ns= 1.56c 1147 SSE2 :CVTDQ2PS xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1148 SSE2 :CVTPS2DQ xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1149 SSE2 :CVTPS2DQ + CVTDQ2PS L: 5.76ns= 8.0c T: 0.40ns= 0.56c 1150 SSE2 :CVTTPS2DQ xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1151 SSE2 :CVTTPS2DQ + CVTDQ2PS L: 5.76ns= 8.0c T: 0.40ns= 0.56c 1157 SSE2 :CVTPS2PD xmm, xmm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 1158 SSE2 :CVTPD2PS xmm, xmm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 1159 SSE2 :CVTPD2PS + CVTPS2PD L: 7.19ns= 9.9c T: 1.23ns= 1.71c 1160 SSE2 :CVTSS2SD xmm, xmm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 1161 SSE2 :CVTSD2SS xmm, xmm L: 3.66ns= 5.1c T: 0.73ns= 1.00c 1162 SSE2 :CVTSD2SS + CVTSS2SD L: 7.19ns= 9.9c T: 1.13ns= 1.56c 1169 SSE2 :MOVD r32, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1170 SSE2 :MOVD xmm, r32 L: [diff. reg. set] T: 0.73ns= 1.00c 1171 SSE2 :MOVD r32, xmm+MOVD xmm, r32 L: 2.88ns= 4.0c T: 0.73ns= 1.00c 1175 AMD64 :MOVD r64, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1176 AMD64 :MOVD xmm, r64 L: [diff. reg. set] T: 0.73ns= 1.00c 1177 AMD64 :MOVD r64, xmm+MOVD xmm, r64 L: 2.88ns= 4.0c T: 0.73ns= 1.00c 1181 SSE2 :MOVD xmm, [m32] L: [memory dep.] T: 0.36ns= 0.50c 1182 SSE2 :MOVD [m32], xmm L: [memory dep.] T: 0.36ns= 0.50c 1183 SSE2 :MOVD LS pair L: 3.66ns= 5.1c T: 1.44ns= 1.99c 1187 SSE2 :MOVQ xmm, [m64] L: [memory dep.] T: 0.36ns= 0.50c 1188 SSE2 :MOVQ [m64], xmm L: [memory dep.] T: 0.36ns= 0.50c 1189 SSE2 :MOVQ LS pair L: 3.66ns= 5.1c T: 1.44ns= 1.99c 1193 SSE2 :MOVDQ2Q mm, xmm L: [diff. reg. set] T: 0.72ns= 0.99c 1194 SSE2 :MOVQ2DQ xmm, mm L: [diff. reg. set] T: 0.82ns= 1.13c 1195 SSE2 :MOVDQ2Q + MOVQ2DQ xmm, mm L: 2.88ns= 4.0c T: 1.44ns= 1.99c 1196 SSE2 :MOVDQA xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1197 SSE2 :MOVDQA xmm, [m128] L: [memory dep.] T: 0.36ns= 0.50c 1198 SSE2 :MOVDQA [m128], xmm L: [memory dep.] T: 0.36ns= 0.50c 1199 SSE2 :MOVDQA LS pair L: 3.66ns= 5.1c T: 1.44ns= 1.99c 1204 SSE2 :MOVDQU xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1205 SSE2 :MOVDQU xmm, [m128] L: [memory dep.] T: 0.36ns= 0.50c 1206 SSE2 :MOVDQU [m128], xmm L: [memory dep.] T: 0.36ns= 0.50c 1207 SSE2 :MOVDQU aligned LS pair L: 3.66ns= 5.1c T: 1.44ns= 1.99c 1208 SSE2 :MOVDQU xmm, [m128 + 4] L: [memory dep.] T: 0.91ns= 1.26c 1209 SSE2 :MOVDQU [m128 + 4], xmm L: [memory dep.] T: 0.60ns= 0.84c 1210 SSE2 :MOVDQU unaligned LS pair L: 3.66ns= 5.1c T: 1.27ns= 1.75c 1218 SSE4.1 :MOVNTDQA xmm, [m128] L: [memory dep.] T: 0.51ns= 0.51c 1219 SSE2 :MOVNTDQ [m128], xmm L: [memory dep.] T: 1.13ns= 1.13c 1220 SSE4.1 :MOVNTDQA + MOVNTDQ L: 361.17ns=499.3c T: 499.28ns=499.28c 1224 SSE2 :PMOVMSKB r32, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1225 AMD64 :PMOVMSKB r64, xmm L: [diff. reg. set] T: 0.73ns= 1.00c 1228 SSE2 :MASKMOVDQU xmm, xmm L: [memory dep.] T: 7.05ns= 7.05c 1230 SSE2 :PADDB xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1232 SSE2 :PADDW xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1234 SSE2 :PADDD xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1236 SSE2 :PADDQ xmm, xmm L: 0.71ns= 1.0c T: 0.19ns= 0.27c 1238 SSE2 :PADDSB xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1240 SSE2 :PADDSW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1242 SSE2 :PADDUSB xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1244 SSE2 :PADDUSW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1246 SSE2 :PSUBB xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1247 SSE2 :PSUBB xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1250 SSE2 :PSUBW xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1251 SSE2 :PSUBW xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1254 SSE2 :PSUBD xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1255 SSE2 :PSUBD xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1258 SSE2 :PSUBQ xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1259 SSE2 :PSUBQ xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1262 SSE2 :PSUBSB xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1263 SSE2 :PSUBSB xmm1, xmm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1266 SSE2 :PSUBSW xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1267 SSE2 :PSUBSW xmm1, xmm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1270 SSE2 :PSUBUSB xmm, xmm L: 0.14ns= 0.2c T: 0.14ns= 0.20c 1271 SSE2 :PSUBUSB xmm1, xmm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1274 SSE2 :PSUBUSW xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1275 SSE2 :PSUBUSW xmm1, xmm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1278 SSE2 :PCMPEQB xmm, xmm L: 0.36ns= 0.5c T: 0.36ns= 0.50c 1279 SSE2 :PCMPEQB xmm1, xmm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1282 SSE2 :PCMPEQW xmm, xmm L: 0.35ns= 0.5c T: 0.35ns= 0.49c 1283 SSE2 :PCMPEQW xmm1, xmm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1286 SSE2 :PCMPEQD xmm, xmm L: 0.36ns= 0.5c T: 0.36ns= 0.50c 1287 SSE2 :PCMPEQD xmm1, xmm2 L: 0.73ns= 1.0c T: 0.36ns= 0.49c 1290 SSE4.1 :PCMPEQQ xmm, xmm L: 0.36ns= 0.5c T: 0.36ns= 0.50c 1291 SSE4.1 :PCMPEQQ xmm1, xmm2 L: 0.73ns= 1.0c T: 0.37ns= 0.51c 1294 SSE2 :PCMPGTB xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1295 SSE2 :PCMPGTB xmm1, xmm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1298 SSE2 :PCMPGTW xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1299 SSE2 :PCMPGTW xmm1, xmm2 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1302 SSE2 :PCMPGTD xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1303 SSE2 :PCMPGTD xmm1, xmm2 L: 0.71ns= 1.0c T: 0.36ns= 0.50c 1306 SSE4.2 :PCMPGTQ xmm, xmm L: 0.19ns= 0.3c T: 0.19ns= 0.26c 1307 SSE4.2 :PCMPGTQ xmm1, xmm2 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 1310 SSE2 :PAND xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1311 SSE2 :PAND xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1314 SSE2 :PANDN xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1315 SSE2 :PANDN xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1318 SSE2 :POR xmm, xmm L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1319 SSE2 :POR xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1322 SSE2 :PXOR xmm, xmm L: 0.14ns= 0.2c T: 0.04ns= 0.05c 1323 SSE2 :PXOR xmm1, xmm2 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1326 SSE2 :PMULHW xmm, xmm L: 3.66ns= 5.1c T: 0.99ns= 1.37c 1328 SSE2 :PMULHUW xmm, xmm L: 3.66ns= 5.1c T: 0.99ns= 1.37c 1330 SSSE3 :PMULHRSW xmm, xmm L: 3.66ns= 5.1c T: 0.99ns= 1.37c 1332 SSE2 :PMULLW xmm, xmm L: 3.66ns= 5.1c T: 0.99ns= 1.37c 1334 SSE4.1 :PMULLD xmm, xmm L: 7.19ns= 9.9c T: 1.57ns= 2.17c 1336 SSE4.1 :PMULDQ xmm, xmm L: 3.66ns= 5.1c T: 0.99ns= 1.37c 1338 SSE2 :PMULUDQ xmm, xmm L: 3.66ns= 5.1c T: 0.99ns= 1.37c 1340 SSSE3 :PMADDUBSW xmm, xmm L: 3.66ns= 5.1c T: 0.99ns= 1.37c 1342 SSE2 :PMADDWD xmm, xmm L: 3.66ns= 5.1c T: 0.99ns= 1.37c 1344 SSE2 :PSLLW xmm, xmm L: 1.44ns= 2.0c T: 0.65ns= 0.90c 1346 SSE2 :PSLLW xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1348 SSE2 :PSLLD xmm, xmm L: 1.44ns= 2.0c T: 0.62ns= 0.86c 1350 SSE2 :PSLLD xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1352 SSE2 :PSLLQ xmm, xmm L: 1.44ns= 2.0c T: 0.63ns= 0.87c 1354 SSE2 :PSLLQ xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1356 SSE2 :PSLLDQ xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1358 SSE2 :PSRAW xmm, xmm L: 1.44ns= 2.0c T: 0.64ns= 0.89c 1360 SSE2 :PSRAW xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1362 SSE2 :PSRAD xmm, xmm L: 1.44ns= 2.0c T: 0.64ns= 0.89c 1364 SSE2 :PSRAD xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1366 SSE2 :PSRLW xmm, xmm L: 1.44ns= 2.0c T: 0.68ns= 0.94c 1368 SSE2 :PSRLW xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1370 SSE2 :PSRLD xmm, xmm L: 1.44ns= 2.0c T: 0.65ns= 0.90c 1372 SSE2 :PSRLD xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1374 SSE2 :PSRLQ xmm, xmm L: 1.44ns= 2.0c T: 0.64ns= 0.88c 1376 SSE2 :PSRLQ xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1378 SSE2 :PSRLDQ xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1380 SSE2 :PUNPCKHBW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1382 SSE2 :PUNPCKHWD xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1384 SSE2 :PUNPCKHDQ xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1386 SSE2 :PUNPCKHQDQ xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1388 SSE2 :PUNPCKLBW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1390 SSE2 :PUNPCKLWD xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1392 SSE2 :PUNPCKLDQ xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1394 SSE2 :PUNPCKLQDQ xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1396 SSE2 :PACKSSWB xmm, xmm L: 2.22ns= 3.1c T: 0.73ns= 1.00c 1398 SSE2 :PACKUSWB xmm, xmm L: 2.22ns= 3.1c T: 0.73ns= 1.00c 1400 SSE2 :PACKSSDW xmm, xmm L: 2.22ns= 3.1c T: 0.73ns= 1.00c 1402 SSE4.1 :PACKUSDW xmm, xmm L: 2.22ns= 3.1c T: 0.73ns= 1.00c 1404 SSE2 :PAVGB xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1406 SSE2 :PAVGW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1408 SSE4.1 :PEXTRB r32, xmm, im8 L: [diff. reg. set] T: 0.73ns= 1.00c 1409 SSE4.1 :PINSRB xmm, r32, im8 L: [diff. reg. set] T: 0.79ns= 1.09c 1410 SSE4.1 :PEXTRB + PINSRB r32 L: 4.32ns= 6.0c T: 1.39ns= 1.93c 1414 SSE4.1 :PEXTRB r64, xmm, im8 L: [diff. reg. set] T: 0.73ns= 1.00c 1415 SSE4.1 :PEXTRB r64 + PINSRB r32 L: 4.32ns= 6.0c T: 1.40ns= 1.94c 1418 SSE2 :PEXTRW r32, xmm, im8 L: [diff. reg. set] T: 0.73ns= 1.00c 1419 SSE2 :PINSRW xmm, r32, im8 L: [diff. reg. set] T: 0.79ns= 1.09c 1420 SSE2 :PEXTRW + PINSRW r32 L: 4.32ns= 6.0c T: 1.44ns= 1.99c 1424 AMD64 :PEXTRW r64, xmm, im8 L: [diff. reg. set] T: 0.73ns= 1.00c 1425 AMD64 :PEXTRW r64 + PINSRW r32 L: 4.32ns= 6.0c T: 1.38ns= 1.91c 1428 SSE4.1 :PEXTRD r32, xmm, im8 L: [diff. reg. set] T: 0.73ns= 1.00c 1429 SSE4.1 :PINSRD xmm, r32, im8 L: [diff. reg. set] T: 0.79ns= 1.09c 1430 SSE4.1 :PEXTRD + PINSRD r32 L: 4.32ns= 6.0c T: 1.39ns= 1.93c 1434 SSE4.1 :PEXTRQ r64, xmm, im8 L: [diff. reg. set] T: 0.73ns= 1.00c 1435 SSE4.1 :PINSRQ xmm, r64, im8 L: [diff. reg. set] T: 0.79ns= 1.09c 1436 SSE4.1 :PEXTRD + PINSRD r64 L: 4.32ns= 6.0c T: 1.44ns= 1.99c 1440 SSE4.1 :EXTRACTPS r32, xmm, im8 L: [diff. reg. set] T: 0.73ns= 1.00c 1442 SSE4.1 :EXTRACTPS r64, xmm, im8 L: [diff. reg. set] T: 0.73ns= 1.00c 1444 SSE4.1 :INSERTPS xmm, xmm, im8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 1450 SSE2 :PMAXUB xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1452 SSE4.1 :PMAXSB xmm, xmm L: 0.71ns= 1.0c T: 0.36ns= 0.50c 1454 SSE4.1 :PMAXUW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1456 SSE2 :PMAXSW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1458 SSE4.1 :PMAXUD xmm, xmm L: 0.71ns= 1.0c T: 0.36ns= 0.50c 1460 SSE4.1 :PMAXSD xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1462 SSE2 :PMINUB xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1464 SSE4.1 :PMINSB xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1466 SSE4.1 :PMINUW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1468 SSE2 :PMINSW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1470 SSE4.1 :PMINUD xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1472 SSE4.1 :PMINSD xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1474 SSE2 :PSADBW xmm, xmm L: 2.22ns= 3.1c T: 0.73ns= 1.00c 1476 SSSE3 :PSHUFB xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1478 SSE2 :PSHUFLW xmm, xmm, im8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1480 SSE2 :PSHUFHW xmm, xmm, im8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1482 SSE2 :PSHUFD xmm, xmm, im8 L: 0.71ns= 1.0c T: 0.36ns= 0.50c 1484 SSE3 :ADDSUBPS xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1486 SSE3 :ADDSUBPD xmm, xmm L: 2.88ns= 4.0c T: 0.78ns= 1.08c 1488 SSE3 :HADDPS xmm, xmm L: 4.32ns= 6.0c T: 1.44ns= 1.99c 1490 SSE3 :HADDPD xmm, xmm L: 4.32ns= 6.0c T: 1.44ns= 1.99c 1492 SSE3 :HSUBPS xmm, xmm L: 4.32ns= 6.0c T: 1.44ns= 1.99c 1494 SSE3 :HSUBPD xmm, xmm L: 4.32ns= 6.0c T: 1.44ns= 1.99c 1496 SSE3 :MOVSLDUP xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1498 SSE3 :MOVSHDUP xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1500 SSE3 :MOVDDUP xmm, xmm L: 0.73ns= 1.0c T: 0.73ns= 1.00c 1502 SSE3 :LDDQU xmm, [m128 + 4] L: [memory dep.] T: 0.48ns= 0.67c 1504 SSSE3 :PABSB xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1506 SSSE3 :PABSW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1508 SSSE3 :PABSD xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1510 SSSE3 :PALIGNR xmm, xmm, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 1512 SSSE3 :PHADDW xmm, xmm L: 1.44ns= 2.0c T: 0.78ns= 1.07c 1514 SSSE3 :PHADDD xmm, xmm L: 1.44ns= 2.0c T: 0.78ns= 1.07c 1516 SSSE3 :PHADDSW xmm, xmm L: 1.44ns= 2.0c T: 0.77ns= 1.06c 1518 SSSE3 :PHSUBW xmm, xmm L: 1.44ns= 2.0c T: 0.76ns= 1.05c 1520 SSSE3 :PHSUBD xmm, xmm L: 1.44ns= 2.0c T: 0.80ns= 1.11c 1522 SSSE3 :PHSUBSW xmm, xmm L: 1.44ns= 2.0c T: 0.77ns= 1.06c 1524 SSSE3 :PSIGNB xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1526 SSSE3 :PSIGNW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1528 SSSE3 :PSIGND xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1530 SSE4.1 :BLENDPS xmm, xmm, imm8 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1532 SSE4.1 :BLENDVPS xmm, xmm, L: 0.73ns= 1.0c T: 0.22ns= 0.31c 1534 SSE4.1 :BLENDPD xmm, xmm, imm8 L: 0.73ns= 1.0c T: 0.20ns= 0.27c 1536 SSE4.1 :BLENDVPD xmm, xmm, L: 0.73ns= 1.0c T: 0.22ns= 0.31c 1538 SSE4.1 :PBLENDW xmm, xmm, imm8 L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1540 SSE4.1 :PBLENDVB xmm, xmm, L: 0.73ns= 1.0c T: 0.22ns= 0.31c 1542 SSE4.1 :DPPS xmm, xmm, imm8 L: 10.20ns= 14.1c T: 2.88ns= 3.98c 1544 SSE4.1 :DPPD xmm, xmm, imm8 L: 6.54ns= 9.0c T: 1.57ns= 2.17c 1546 SSE4.1 :MPSADBW xmm, xmm, imm8 L: 3.53ns= 4.9c T: 0.74ns= 1.03c 1548 SSE4.1 :PHMINPOSUW xmm, xmm L: 2.88ns= 4.0c T: 0.73ns= 1.00c 1550 SSE4.1 :PMOVSXBW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1552 SSE4.1 :PMOVSXBD xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1554 SSE4.1 :PMOVSXBQ xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1556 SSE4.1 :PMOVSXWD xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1558 SSE4.1 :PMOVSXWQ xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1560 SSE4.1 :PMOVSXDQ xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1562 SSE4.1 :PMOVZXBW xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1564 SSE4.1 :PMOVZXBD xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1566 SSE4.1 :PMOVZXBQ xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1568 SSE4.1 :PMOVZXWD xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1570 SSE4.1 :PMOVZXWQ xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1572 SSE4.1 :PMOVZXDQ xmm, xmm L: 0.73ns= 1.0c T: 0.36ns= 0.50c 1574 SSE4.1 :PTEST xmm, xmm L: [no true dep.] T: 0.73ns= 1.00c 1578 SSE4.1 :ROUNDSS xmm, xmm, imm8 L: 5.76ns= 8.0c T: 0.39ns= 0.54c 1580 SSE4.1 :ROUNDPS xmm, xmm, imm8 L: 5.76ns= 8.0c T: 0.39ns= 0.54c 1582 SSE4.1 :ROUNDSD xmm, xmm, imm8 L: 5.76ns= 8.0c T: 0.39ns= 0.54c 1584 SSE4.1 :ROUNDPD xmm, xmm, imm8 L: 5.76ns= 8.0c T: 0.39ns= 0.54c 1587 SSE4.2 :PCMPESTRI xmm, xmm, imm8 L: 2.88ns= 4.0c T: 3.14ns= 4.34c 1589 SSE4.2 :PCMPESTRM xmm, xmm, imm8 L: 3.66ns= 5.1c T: 3.66ns= 5.06c 1591 SSE4.2 :PCMPISTRI xmm, xmm, imm8 L: 2.22ns= 3.1c T: 2.22ns= 3.07c 1593 SSE4.2 :PCMPISTRM xmm, xmm, imm8 L: 2.22ns= 3.1c T: 2.22ns= 3.07c 1595 CLMUL :PCLMULQDQ xmm, xmm, imm8 L: 4.32ns= 6.0c T: 0.73ns= 1.00c 1597 AESNI :AESENC xmm, xmm L: 2.22ns= 3.1c T: 0.36ns= 0.50c 1599 AESNI :AESENCLAST xmm, xmm L: 2.22ns= 3.1c T: 0.36ns= 0.50c 1601 AESNI :AESDEC xmm, xmm L: 2.22ns= 3.1c T: 0.36ns= 0.50c 1603 AESNI :AESDECLAST xmm, xmm L: 2.22ns= 3.1c T: 0.36ns= 0.50c 1605 AESNI :AESIMC xmm, xmm L: 4.32ns= 6.0c T: 0.67ns= 0.92c 1607 AESNI :AESKEYGEN xmm, xmm, imm8 L: 8.63ns= 11.9c T: 8.63ns= 11.93c 1971 RDRAND :RDRAND r16 L: [no true dep.] T:1056.69ns=1460.77c 1972 RDRAND :RDRAND r32 L: [no true dep.] T:1056.95ns=1461.13c 1973 RDRAND :RDRAND r64 L: [no true dep.] T:1058.52ns=1463.30c 1974 X86 :MOV+ADD r8, r8 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 1975 X86 :MOV+ADD r16, r16 L: 1.44ns= 2.0c T: 0.41ns= 0.57c 1976 X86 :MOV+ADD r32, r32 L: 1.44ns= 2.0c T: 0.44ns= 0.61c 1977 AMD64 :MOV+ADD r64, r64 L: 1.44ns= 2.0c T: 0.43ns= 0.59c 1978 MMX :MOVQ+PADDB mm, mm L: 1.44ns= 2.0c T: 0.73ns= 1.00c 1979 MMX :MOVQ+PADDW mm, mm L: 1.44ns= 2.0c T: 0.73ns= 1.00c 1980 MMX :MOVQ+PADDD mm, mm L: 1.44ns= 2.0c T: 0.73ns= 1.00c 1981 SSE2 :MOVQ+PADDQ mm, mm L: 1.44ns= 2.0c T: 0.73ns= 1.00c 1983 SSE :MOVSS+ADDSS xmm, xmm L: 4.19ns= 5.8c T: 1.13ns= 1.57c 1985 SSE :MOVAPS+ADDPS xmm, xmm L: 4.58ns= 6.3c T: 1.24ns= 1.72c 1987 SSE2 :MOVSD+ADDSD xmm, xmm L: 4.19ns= 5.8c T: 1.44ns= 1.99c 1989 SSE2 :MOVAPD+ADDPD xmm, xmm L: 4.58ns= 6.3c T: 1.24ns= 1.72c 1991 SSE2 :MOVDQA+PADDB xmm, xmm L: 1.44ns= 2.0c T: 0.39ns= 0.54c 1992 SSE2 :MOVDQA+PADDW xmm, xmm L: 1.44ns= 2.0c T: 0.39ns= 0.54c 1993 SSE2 :MOVDQA+PADDD xmm, xmm L: 1.44ns= 2.0c T: 0.38ns= 0.53c 1994 SSE2 :MOVDQA+PADDQ xmm, xmm L: 1.44ns= 2.0c T: 0.38ns= 0.53c 2001 RDSEED :RDSEED r16 L: [no true dep.] T:1057.22ns=1461.49c 2002 RDSEED :RDSEED r32 L: [no true dep.] T:1056.56ns=1460.59c 2003 RDSEED :RDSEED r64 L: [no true dep.] T:1058.13ns=1462.76c 2238 CLFLUSH :CLFLUSH [mem] L: [memory dep.] T: 58.73ns= 81.19c 2239 CLFLUSHOPT :CLFLUSHOPT [mem] L: [memory dep.] T: 34.27ns= 47.38c 2241 SHA :SHA1RNDS4 xmm, xmm, imm8 L: 4.32ns= 6.0c T: 2.22ns= 3.07c 2242 SHA :SHA1NEXTE xmm, xmm L: 2.22ns= 3.1c T: 0.71ns= 0.98c 2243 SHA :SHA1MSG1 xmm, xmm L: 1.44ns= 2.0c T: 0.73ns= 1.00c 2244 SHA :SHA1MSG2 xmm, xmm L: 4.45ns= 6.1c T: 2.88ns= 3.98c 2245 SHA :SHA256RNDS2 xm, xm, L: 2.88ns= 4.0c T: 2.22ns= 3.07c 2246 SHA :SHA256MSG1 xmm, xmm L: 3.66ns= 5.1c T: 3.66ns= 5.06c 2247 SHA :SHA256MSG2 xmm, xmm L: 7.98ns= 11.0c T: 3.66ns= 5.06c 2248 X86 :MOV r1_8, r2_8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 2249 X86 :MOV r1_16, r2_16 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 2250 X86 :MOV r1_32, r2_32 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 2251 AMD64 :MOV r1_64, r2_64 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 2252 X86 :MOVSX r1_16, r2_8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 2253 X86 :MOVSX r1_32, r2_8 L: 0.24ns= 0.3c T: 0.24ns= 0.33c 2254 AMD64 :MOVSX r1_64, r2_8 L: 0.18ns= 0.2c T: 0.18ns= 0.24c 2255 X86 :MOVSX r1_32, r2_16 L: 0.18ns= 0.2c T: 0.18ns= 0.24c 2256 AMD64 :MOVSX r1_64, r2_16 L: 0.18ns= 0.2c T: 0.18ns= 0.24c 2257 AMD64 :MOVSXD r1_64, r2_32 L: 0.18ns= 0.2c T: 0.18ns= 0.24c 2258 X86 :MOVZX r1_16, r2_8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 2259 X86 :MOVZX r1_32, r2_8 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 2260 AMD64 :MOVZX r1_64, r2_8 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 2261 X86 :MOVZX r1_32, r2_16 L: 0.18ns= 0.2c T: 0.18ns= 0.24c 2262 AMD64 :MOVZX r1_64, r2_16 L: 0.18ns= 0.2c T: 0.18ns= 0.24c 2263 MMX :MOVQ mm1, mm2 L: 0.35ns= 0.5c T: 0.35ns= 0.49c 2264 SSE :MOVSS xmm1, xmm2 L: 0.73ns= 1.0c T: 0.37ns= 0.51c 2266 SSE :MOVAPS xmm1, xmm2 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 2268 SSE :MOVUPS xmm1, xmm2 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 2270 SSE2 :MOVSD xmm1, xmm2 L: 0.73ns= 1.0c T: 0.37ns= 0.52c 2272 SSE2 :MOVAPD xmm1, xmm2 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 2274 SSE2 :MOVUPD xmm1, xmm2 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 2276 SSE2 :MOVDQA xmm1, xmm2 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 2278 SSE2 :MOVDQU xmm1, xmm2 L: 0.14ns= 0.2c T: 0.14ns= 0.20c 2290 SSE :4xADDPS xm1,xm1 4x xm2,xm2 L: 11.64ns= 16.1c T: 11.64ns= 16.09c 2291 SSE :4xMULPS xm1,xm1 4x xm2,xm2 L: 11.64ns= 16.1c T: 11.64ns= 16.09c 2292 SSE2 :4xADDPD xm1,xm1 4x xm2,xm2 L: 11.64ns= 16.1c T: 11.64ns= 16.09c 2293 SSE2 :4xMULPD xm1,xm1 4x xm2,xm2 L: 11.64ns= 16.1c T: 11.64ns= 16.09c 2294 LNOP :LNOP3 [eax], eax L: [no true dep.] T: 0.14ns= 0.20c 2295 LNOP :LNOP4 [eax+disp8], eax L: [no true dep.] T: 0.14ns= 0.20c 2296 LNOP :LNOP5 [SIB+disp8], eax L: [no true dep.] T: 0.33ns= 0.45c 2297 LNOP :LNOP6 [SIB+disp8], ax L: [no true dep.] T: 0.32ns= 0.44c 2298 LNOP :LNOP7 [eax+disp32], eax L: [no true dep.] T: 0.71ns= 0.98c 2299 LNOP :LNOP8 [SIB+disp32], eax L: [no true dep.] T: 0.40ns= 0.56c 2300 LNOP :LNOP9 [SIB+disp32], ax L: [no true dep.] T: 0.40ns= 0.55c 2301 LNOP :2x66 LNOPA [SIB+disp32], ax L: [no true dep.] T: 0.74ns= 1.03c 2302 LNOP :3x66 LNOPB [SIB+disp32], ax L: [no true dep.] T: 0.04ns= 0.06c 2303 LNOP :4x66 LNOPC [SIB+disp32], ax L: [no true dep.] T: 0.36ns= 0.49c 2304 LNOP :5x66 LNOPD [SIB+disp32], ax L: [no true dep.] T: 0.81ns= 1.12c 2305 LNOP :6x66 LNOPE [SIB+disp32], ax L: [no true dep.] T: 0.92ns= 1.27c 2306 LNOP :7x66 LNOPF [SIB+disp32], ax L: [no true dep.] T: 1.00ns= 1.38c 2326 CLWB :CLWB [mem] L: [memory dep.] T: 4.32ns= 5.97c 2330 RDPID :RDPID r32/r64 L: [no true dep.] T: 3.66ns= 5.06c 4336 GFNI :GF2P8AFFINEINVQB xmm, xmm, imm8 L: 2.22ns= 3.1c T: 0.36ns= 0.50c 4342 GFNI :GF2P8AFFINEQB xmm, xmm, imm8 L: 2.22ns= 3.1c T: 0.36ns= 0.50c 4348 GFNI :GF2P8MULB xmm, xmm L: 2.22ns= 3.1c T: 0.36ns= 0.50c 4354 X86 :SHLD r1_16, r2_16, imm8 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 4355 X86 :SHLD r1_32, r2_32, imm8 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 4356 AMD64 :SHLD r1_64, r2_64, imm8 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 4357 X86 :SHLD r1_16, r2_16, cl L: 2.22ns= 3.1c T: 0.69ns= 0.95c 4358 X86 :SHLD r1_32, r2_32, cl L: 2.22ns= 3.1c T: 0.69ns= 0.95c 4359 AMD64 :SHLD r1_64, r2_64, cl L: 2.22ns= 3.1c T: 0.72ns= 1.00c 4360 X86 :SHRD r1_16, r2_16, imm8 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 4361 X86 :SHRD r1_32, r2_32, imm8 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 4362 AMD64 :SHRD r1_64, r2_64, imm8 L: 2.22ns= 3.1c T: 0.73ns= 1.00c 4363 X86 :SHRD r1_16, r2_16, cl L: 3.14ns= 4.3c T: 0.49ns= 0.67c 4364 X86 :SHRD r1_32, r2_32, cl L: 3.14ns= 4.3c T: 0.49ns= 0.67c 4365 AMD64 :SHRD r1_64, r2_64, cl L: 3.14ns= 4.3c T: 0.69ns= 0.96c 4366 X86 :ADC r8, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4367 X86 :ADC r16, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4368 X86 :ADC r32, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4369 AMD64 :ADC r64, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4370 X86 :ADC r16, imm16 L: 0.78ns= 1.1c T: 1.02ns= 1.41c 4371 X86 :ADC r32, imm32 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4372 AMD64 :ADC r64, imm32 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4373 X86 :ADC al, imm8 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4374 X86 :ADC ax, imm16 L: 1.44ns= 2.0c T: 1.96ns= 2.71c 4375 X86 :ADC eax, imm32 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4376 AMD64 :ADC rax, imm32 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4377 X86 :ADC r8, imm8_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4378 X86 :ADC r16, imm8_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4379 X86 :ADC r32, imm8_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4380 AMD64 :ADC r64, imm8_0 L: 0.71ns= 1.0c T: 0.71ns= 0.98c 4381 X86 :ADC r16, imm16_0 L: 0.79ns= 1.1c T: 0.97ns= 1.34c 4382 X86 :ADC r32, imm32_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4383 AMD64 :ADC r64, imm32_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4384 X86 :ADC al, imm8_0 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4385 X86 :ADC ax, imm16_0 L: 1.44ns= 2.0c T: 2.22ns= 3.07c 4386 X86 :ADC eax, imm32_0 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4387 AMD64 :ADC rax, imm32_0 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4388 X86 :SBB r8, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4389 X86 :SBB r16, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4390 X86 :SBB r32, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4391 AMD64 :SBB r64, imm8 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4392 X86 :SBB r16, imm16 L: 0.79ns= 1.1c T: 0.97ns= 1.34c 4393 X86 :SBB r32, imm32 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4394 AMD64 :SBB r64, imm32 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4395 X86 :SBB al, imm8 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4396 X86 :SBB ax, imm16 L: 1.44ns= 2.0c T: 2.35ns= 3.25c 4397 X86 :SBB eax, imm32 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4398 AMD64 :SBB rax, imm32 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4399 X86 :SBB r8, imm8_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4400 X86 :SBB r16, imm8_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4401 X86 :SBB r32, imm8_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4402 AMD64 :SBB r64, imm8_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4403 X86 :SBB r16, imm16_0 L: 0.79ns= 1.1c T: 1.00ns= 1.39c 4404 X86 :SBB r32, imm32_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4405 AMD64 :SBB r64, imm32_0 L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4406 X86 :SBB al, imm8_0 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4407 X86 :SBB ax, imm16_0 L: 1.44ns= 2.0c T: 1.96ns= 2.71c 4408 X86 :SBB eax, imm32_0 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4409 AMD64 :SBB rax, imm32_0 L: 1.44ns= 2.0c T: 1.44ns= 1.99c 4410 AMD64 :LEA r16, [disp32] L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4411 AMD64 :LEA r32, [disp32] L: 0.18ns= 0.2c T: 0.18ns= 0.24c 4412 AMD64 :LEA r64, [disp32] L: 0.18ns= 0.3c T: 0.18ns= 0.25c 4413 AMD64 :LEA r16, [r64] L: 1.44ns= 2.0c T: 0.73ns= 1.00c 4414 AMD64 :LEA r32, [r64] L: 0.73ns= 1.0c T: 0.13ns= 0.18c 4415 AMD64 :LEA r64, [r64] L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4416 AMD64 :LEA r16, [r64 + disp8] L: 1.44ns= 2.0c T: 0.72ns= 0.99c 4417 AMD64 :LEA r32, [r64 + disp8] L: 0.73ns= 1.0c T: 0.32ns= 0.44c 4418 AMD64 :LEA r64, [r64 + disp8] L: 0.73ns= 1.0c T: 0.13ns= 0.18c 4419 AMD64 :LEA r16, [r64 + disp32] L: 1.44ns= 2.0c T: 0.72ns= 1.00c 4420 AMD64 :LEA r32, [r64 + disp32] L: 0.73ns= 1.0c T: 0.35ns= 0.48c 4421 AMD64 :LEA r64, [r64 + disp32] L: 0.73ns= 1.0c T: 0.34ns= 0.47c 4422 AMD64 :LEA r16, [r64 + r64] L: 1.44ns= 2.0c T: 0.73ns= 1.02c 4423 AMD64 :LEA r32, [r64 + r64] L: 0.73ns= 1.0c T: 0.32ns= 0.44c 4424 AMD64 :LEA r64, [r64 + r64] L: 0.73ns= 1.0c T: 0.13ns= 0.18c 4425 AMD64 :LEA r16, [r64 + r64 + disp8] L: 1.44ns= 2.0c T: 0.73ns= 1.01c 4426 AMD64 :LEA r32, [r64 + r64 + disp8] L: 0.73ns= 1.0c T: 0.13ns= 0.18c 4427 AMD64 :LEA r64, [r64 + r64 + disp8] L: 0.73ns= 1.0c T: 0.13ns= 0.18c 4428 AMD64 :LEA r16, [r64 + r64 + disp32] L: 1.44ns= 2.0c T: 0.73ns= 1.01c 4429 AMD64 :LEA r32, [r64 + r64 + disp32] L: 0.73ns= 1.0c T: 0.35ns= 0.48c 4430 AMD64 :LEA r64, [r64 + r64 + disp32] L: 0.73ns= 1.0c T: 0.37ns= 0.51c 4431 AMD64 :LEA r16, [r64 + r64 * 8] L: 1.44ns= 2.0c T: 0.72ns= 1.00c 4432 AMD64 :LEA r32, [r64 + r64 * 8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 4433 AMD64 :LEA r64, [r64 + r64 * 8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 4434 AMD64 :LEA r16, [r64 + r64 * 8 + disp8] L: 1.44ns= 2.0c T: 0.74ns= 1.03c 4435 AMD64 :LEA r32, [r64 + r64 * 8 + disp8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 4436 AMD64 :LEA r64, [r64 + r64 * 8 + disp8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 4437 AMD64 :LEA r16, [r64 + r64 * 8 + disp32] L: 1.44ns= 2.0c T: 0.73ns= 1.01c 4438 AMD64 :LEA r32, [r64 + r64 * 8 + disp32] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 4439 AMD64 :LEA r64, [r64 + r64 * 8 + disp32] L: 0.71ns= 1.0c T: 0.36ns= 0.50c 4440 AMD64 :ASP LEA r16, [disp32] L: 0.73ns= 1.0c T: 0.73ns= 1.00c 4441 AMD64 :ASP LEA r32, [disp32] L: 0.18ns= 0.3c T: 0.18ns= 0.25c 4442 AMD64 :ASP LEA r64, [disp32] L: 0.19ns= 0.3c T: 0.19ns= 0.26c 4443 AMD64 :ASP LEA r16, [r32] L: 1.44ns= 2.0c T: 0.71ns= 0.99c 4444 AMD64 :ASP LEA r32, [r32] L: 0.73ns= 1.0c T: 0.18ns= 0.25c 4445 AMD64 :ASP LEA r64, [r32] L: 0.73ns= 1.0c T: 0.18ns= 0.25c 4446 AMD64 :ASP LEA r16, [r32 + disp8] L: 1.44ns= 2.0c T: 0.73ns= 1.01c 4447 AMD64 :ASP LEA r32, [r32 + disp8] L: 0.73ns= 1.0c T: 0.18ns= 0.25c 4448 AMD64 :ASP LEA r64, [r32 + disp8] L: 0.73ns= 1.0c T: 0.18ns= 0.25c 4449 AMD64 :ASP LEA r16, [r32 + disp32] L: 1.44ns= 2.0c T: 0.68ns= 0.95c 4450 AMD64 :ASP LEA r32, [r32 + disp32] L: 0.73ns= 1.0c T: 0.35ns= 0.49c 4451 AMD64 :ASP LEA r64, [r32 + disp32] L: 0.73ns= 1.0c T: 0.38ns= 0.52c 4452 AMD64 :ASP LEA r16, [r32 + r32] L: 1.44ns= 2.0c T: 0.70ns= 0.97c 4453 AMD64 :ASP LEA r32, [r32 + r32] L: 0.73ns= 1.0c T: 0.18ns= 0.25c 4454 AMD64 :ASP LEA r64, [r32 + r32] L: 0.73ns= 1.0c T: 0.18ns= 0.25c 4455 AMD64 :ASP LEA r16, [r32 + r32 + disp8] L: 1.44ns= 2.0c T: 0.73ns= 1.01c 4456 AMD64 :ASP LEA r32, [r32 + r32 + disp8] L: 0.73ns= 1.0c T: 0.18ns= 0.25c 4457 AMD64 :ASP LEA r64, [r32 + r32 + disp8] L: 0.73ns= 1.0c T: 0.34ns= 0.47c 4458 AMD64 :ASP LEA r16, [r32 + r32 + disp32] L: 1.44ns= 2.0c T: 0.73ns= 1.00c 4459 AMD64 :ASP LEA r32, [r32 + r32 + disp32] L: 0.71ns= 1.0c T: 0.40ns= 0.55c 4460 AMD64 :ASP LEA r64, [r32 + r32 + disp32] L: 0.73ns= 1.0c T: 0.40ns= 0.55c 4461 AMD64 :ASP LEA r16, [r32 + r32 * 8] L: 1.44ns= 2.0c T: 0.74ns= 1.02c 4462 AMD64 :ASP LEA r32, [r32 + r32 * 8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 4463 AMD64 :ASP LEA r64, [r32 + r32 * 8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 4464 AMD64 :ASP LEA r16, [r32 + r32 * 8 + disp8] L: 1.44ns= 2.0c T: 0.75ns= 1.03c 4465 AMD64 :ASP LEA r32, [r32 + r32 * 8 + disp8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 4466 AMD64 :ASP LEA r64, [r32 + r32 * 8 + disp8] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 4467 AMD64 :ASP LEA r16, [r32 + r32 * 8 + disp32] L: 1.44ns= 2.0c T: 0.70ns= 0.96c 4468 AMD64 :ASP LEA r32, [r32 + r32 * 8 + disp32] L: 0.73ns= 1.0c T: 0.36ns= 0.50c 4469 AMD64 :ASP LEA r64, [r32 + r32 * 8 + disp32] L: 0.73ns= 1.0c T: 0.39ns= 0.54c