Copyright (C) 1995-2010 FinalWire Ltd. All rights reserved. aida_bench64.dll build: 2.7.333.0 Dec 17 2010 12:18:23 CPUCount: 4, procMask: 0x000000000000000f Size of Memory: 4175568KB OS:6.1.7601 Service Pack 1, v.721 Priority:080 NUMA:0 CPU#00 Vendor: GenuineIntel Family: 6 Model: 2a Stepping: 7 CoreType:0x200206a7 CPU#00 Freq: 3093.07MHz Type: " Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz" CPU#00 Feats: TSC, FPU, CMOV, MMX, SSE, SSE2, SSE3, SSSE3, AMD64, SSE4.1, SSE4.2, POPCNT, L/SAHF, CMPXCHG8B, CMPXCHG16B, CLMUL, AESNI, AVX CPU#00 AffMask:0x0000000000000001 APIC_ID:0x00000000 Phys_ID:000 Core_ID:00 SMT_ID:00 PhysMask:0x000000000000000f CPU#00 L1I cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000001 CPU#00 L1D cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000001 CPU#00 L2 cache: 256KB, 64 byte cache line, 8 way, SMask:0000000000000001 CPU#00 L3 cache: 6144KB, 64 byte cache line, 12 way, SMask:000000000000000f CPU#01 Vendor: GenuineIntel Family: 6 Model: 2a Stepping: 7 CoreType:0x200206a7 CPU#01 Freq: 3093.03MHz Type: " Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz" CPU#01 Feats: TSC, FPU, CMOV, MMX, SSE, SSE2, SSE3, SSSE3, AMD64, SSE4.1, SSE4.2, POPCNT, L/SAHF, CMPXCHG8B, CMPXCHG16B, CLMUL, AESNI, AVX CPU#01 AffMask:0x0000000000000002 APIC_ID:0x00000002 Phys_ID:000 Core_ID:01 SMT_ID:00 PhysMask:0x000000000000000f CPU#01 L1I cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000002 CPU#01 L1D cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000002 CPU#01 L2 cache: 256KB, 64 byte cache line, 8 way, SMask:0000000000000002 CPU#01 L3 cache: 6144KB, 64 byte cache line, 12 way, SMask:000000000000000f CPU#02 Vendor: GenuineIntel Family: 6 Model: 2a Stepping: 7 CoreType:0x200206a7 CPU#02 Freq: 3093.06MHz Type: " Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz" CPU#02 Feats: TSC, FPU, CMOV, MMX, SSE, SSE2, SSE3, SSSE3, AMD64, SSE4.1, SSE4.2, POPCNT, L/SAHF, CMPXCHG8B, CMPXCHG16B, CLMUL, AESNI, AVX CPU#02 AffMask:0x0000000000000004 APIC_ID:0x00000004 Phys_ID:000 Core_ID:02 SMT_ID:00 PhysMask:0x000000000000000f CPU#02 L1I cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000004 CPU#02 L1D cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000004 CPU#02 L2 cache: 256KB, 64 byte cache line, 8 way, SMask:0000000000000004 CPU#02 L3 cache: 6144KB, 64 byte cache line, 12 way, SMask:000000000000000f CPU#03 Vendor: GenuineIntel Family: 6 Model: 2a Stepping: 7 CoreType:0x200206a7 CPU#03 Freq: 3092.96MHz Type: " Intel(R) Core(TM) i5-2400 CPU @ 3.10GHz" CPU#03 Feats: TSC, FPU, CMOV, MMX, SSE, SSE2, SSE3, SSSE3, AMD64, SSE4.1, SSE4.2, POPCNT, L/SAHF, CMPXCHG8B, CMPXCHG16B, CLMUL, AESNI, AVX CPU#03 AffMask:0x0000000000000008 APIC_ID:0x00000006 Phys_ID:000 Core_ID:03 SMT_ID:00 PhysMask:0x000000000000000f CPU#03 L1I cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000008 CPU#03 L1D cache: 32KB, 64 byte cache line, 8 way, SMask:0000000000000008 CPU#03 L2 cache: 256KB, 64 byte cache line, 8 way, SMask:0000000000000008 CPU#03 L3 cache: 6144KB, 64 byte cache line, 12 way, SMask:000000000000000f CPU#00 AffMask:0x0000000000000001 APIC_ID:0x00000000 Phys_ID:000 Core_ID:00 SMT_ID:00 PhysMask:0x000000000000000f CPU#01 AffMask:0x0000000000000002 APIC_ID:0x00000002 Phys_ID:000 Core_ID:01 SMT_ID:00 PhysMask:0x000000000000000f CPU#02 AffMask:0x0000000000000004 APIC_ID:0x00000004 Phys_ID:000 Core_ID:02 SMT_ID:00 PhysMask:0x000000000000000f CPU#03 AffMask:0x0000000000000008 APIC_ID:0x00000006 Phys_ID:000 Core_ID:03 SMT_ID:00 PhysMask:0x000000000000000f Instruction Latency: Used CPUs: 1 ProcMask:0x0000000000000001 0 X86 :NOP L: [no true dep.] T: 0.08ns= 0.25c 1 X86 :0x66 NOP L: [no true dep.] T: 0.08ns= 0.25c 2 X86 : 2x 0x66 NOP L: [no true dep.] T: 0.08ns= 0.25c 3 X86 : 3x 0x66 NOP L: [no true dep.] T: 0.08ns= 0.25c 4 X86 : 4x 0x66 NOP L: [no true dep.] T: 0.10ns= 0.30c 5 X86 : 5x 0x66 NOP L: [no true dep.] T: 0.10ns= 0.29c 6 X86 : 6x 0x66 NOP L: [no true dep.] T: 0.14ns= 0.43c 7 X86 : 7x 0x66 NOP L: [no true dep.] T: 0.17ns= 0.51c 8 X86 : 8x 0x66 NOP L: [no true dep.] T: 0.18ns= 0.54c 9 X86 : 9x 0x66 NOP L: [no true dep.] T: 0.21ns= 0.64c 10 X86 :10x 0x66 NOP L: [no true dep.] T: 0.23ns= 0.71c 11 X86 :11x 0x66 NOP L: [no true dep.] T: 0.25ns= 0.76c 12 X86 :12x 0x66 NOP L: [no true dep.] T: 0.27ns= 0.83c 13 X86 :13x 0x66 NOP L: [no true dep.] T: 0.29ns= 0.89c 14 X86 :14x 0x66 NOP L: [no true dep.] T: 0.30ns= 0.92c 15 SSE2 :PAUSE L: [no true dep.] T: 3.56ns= 11.00c 16 X86 :MOV r8, imm8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 17 X86 :MOV r16, imm16 L: 0.35ns= 1.1c T: 0.35ns= 1.08c 18 X86 :MOV r32, imm32 L: 0.11ns= 0.3c T: 0.11ns= 0.33c 19 AMD64 :MOV r64, imm64 L: 0.32ns= 1.0c T: 0.21ns= 0.65c 20 X86 :MOV r8, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 21 X86 :MOV r16, r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 22 X86 :MOV r32, r32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 23 AMD64 :MOV r64, r64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 24 X86 :MOV r8, [m8] L: 1.94ns= 6.0c T: 0.16ns= 0.50c 25 X86 :MOV r16, [m16] L: 1.94ns= 6.0c T: 0.18ns= 0.57c 26 X86 :MOV r32, [m32] L: 1.29ns= 4.0c T: 0.16ns= 0.50c 27 AMD64 :MOV r64, [m64] L: 1.29ns= 4.0c T: 0.16ns= 0.50c 28 X86 :MOV [m8], r8 L: [memory dep.] T: 0.32ns= 1.00c 29 X86 :MOV [m16], r16 L: [memory dep.] T: 0.32ns= 1.00c 30 X86 :MOV [m32], r32 L: [memory dep.] T: 0.32ns= 1.00c 31 X86 :MOV [m32 + 8], r32 L: [memory dep.] T: 0.32ns= 1.00c 32 AMD64 :MOV [m64], r64 L: [memory dep.] T: 0.32ns= 1.00c 33 AMD64 :MOV [m64 + 16], r64 L: [memory dep.] T: 0.32ns= 1.00c 34 X86 :MOV r8,[m8]+MOV [m8],r8 L: 2.21ns= 6.8c T: 0.15ns= 0.46c 35 X86 :MOV r16,[m16]+MOV [m16],r16 L: 7.49ns= 23.2c T: 1.08ns= 3.33c 36 X86 :MOV r32,[m32]+MOV [m32],r32 L: 7.14ns= 22.1c T: 0.16ns= 0.50c 37 AMD64 :MOV r64,[m64]+MOV [m64],r64 L: 7.14ns= 22.1c T: 0.28ns= 0.87c 38 SSE2 :MOVNTI [m32], r32 L: [memory dep.] T: 1.00ns= 1.00c 39 AMD64 :MOVNTI [m64], r64 L: [memory dep.] T: 1.00ns= 1.00c 40 CMOV :CMOVNZ r16, r16 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 41 CMOV :CMOVNZ r32, r32 L: 0.65ns= 2.0c T: 0.30ns= 0.92c 42 AMD64 :CMOVNZ r64, r64 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 43 X86 :MOVSX r16, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 44 X86 :MOVSX r32, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 45 AMD64 :MOVSX r64, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 46 X86 :MOVSX r32, r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 47 AMD64 :MOVSX r64, r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 48 AMD64 :MOVSXD r64, r32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 49 X86 :MOVZX r16, r8 L: 0.32ns= 1.0c T: 0.10ns= 0.32c 50 X86 :MOVZX r32, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 51 AMD64 :MOVZX r64, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 52 X86 :MOVZX r32, r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 53 AMD64 :MOVZX r64, r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 54 X86 :XCHG r8, r8 L: 0.70ns= 2.2c T: 0.32ns= 1.00c 55 X86 :XCHG r16, r16 L: 0.70ns= 2.2c T: 0.32ns= 1.00c 56 X86 :XCHG r32, r32 L: 0.70ns= 2.2c T: 0.32ns= 1.00c 57 AMD64 :XCHG r64, r64 L: 0.70ns= 2.2c T: 0.32ns= 1.00c 58 X86 :XCHG r1_8, r2_8 L: 0.48ns= 1.5c T: 0.32ns= 1.00c 59 X86 :XCHG r1_16, r2_16 L: 0.48ns= 1.5c T: 0.32ns= 1.00c 60 X86 :XCHG r1_32, r2_32 L: 0.48ns= 1.5c T: 0.32ns= 1.00c 61 AMD64 :XCHG r1_64, r2_64 L: 0.48ns= 1.5c T: 0.32ns= 1.00c 62 X86 :XCHG r8, [m8] L: 7.44ns= 23.0c T: 8.08ns= 25.00c 63 X86 :XCHG r16, [m16] L: 7.44ns= 23.0c T: 8.08ns= 25.00c 64 X86 :XCHG r32, [m32] L: 7.44ns= 23.0c T: 8.08ns= 25.00c 65 AMD64 :XCHG r64, [m64] L: 7.44ns= 23.0c T: 8.08ns= 25.00c 66 X86 :ADD r32, 0x04000 L: 0.32ns= 1.0c T: 0.11ns= 0.35c 67 X86 :ADD r32, 0x08000 L: 0.32ns= 1.0c T: 0.11ns= 0.35c 68 X86 :ADD r32, 0x10000 L: 0.32ns= 1.0c T: 0.11ns= 0.35c 69 X86 :ADD r32, 0x20000 L: 0.32ns= 1.0c T: 0.12ns= 0.36c 70 X86 :ADD r8, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 71 X86 :ADD r16, r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 72 X86 :ADD r32, r32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 73 AMD64 :ADD r64, r64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 74 X86 :ADD r8, [m8] L: 1.94ns= 6.0c T: 0.18ns= 0.56c 75 X86 :ADD r16, [m16] L: 1.94ns= 6.0c T: 0.18ns= 0.57c 76 X86 :ADD r32, [m32] L: 1.94ns= 6.0c T: 0.19ns= 0.58c 77 AMD64 :ADD r64, [m64] L: 1.94ns= 6.0c T: 0.18ns= 0.57c 78 X86 :ADD [m8], r8 L: 1.99ns= 6.2c T: 0.14ns= 0.44c 79 X86 :ADD [m16], r16 L: 1.99ns= 6.2c T: 0.28ns= 0.86c 80 X86 :ADD [m32], r32 L: 1.99ns= 6.2c T: 0.28ns= 0.88c 81 X86 :ADD [m32 + 8], r32 L: 2.02ns= 6.3c T: 0.28ns= 0.87c 82 AMD64 :ADD [m64], r64 L: 1.99ns= 6.2c T: 0.51ns= 1.58c 83 AMD64 :ADD [m64 + 16], r64 L: 1.99ns= 6.2c T: 0.30ns= 0.92c 84 X86 :LOCK ADD [m8], r8 L: 7.44ns= 23.0c T: 8.08ns= 25.00c 85 X86 :LOCK ADD [m16], r16 L: 7.44ns= 23.0c T: 8.08ns= 25.00c 86 X86 :LOCK ADD [m32], r32 L: 7.44ns= 23.0c T: 8.08ns= 25.00c 87 X86 :LOCK ADD [m32 + 8], r32 L: 7.44ns= 23.0c T: 8.08ns= 25.00c 88 AMD64 :LOCK ADD [m64], r64 L: 7.44ns= 23.0c T: 8.08ns= 25.00c 89 AMD64 :LOCK ADD [m64 + 16], r64 L: 7.44ns= 23.0c T: 8.08ns= 25.00c 90 X86 :ADD r8, imm8 L: 0.32ns= 1.0c T: 0.11ns= 0.35c 91 X86 :ADD r16, imm8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 92 X86 :ADD r32, imm8 L: 0.32ns= 1.0c T: 0.11ns= 0.35c 93 AMD64 :ADD r64, imm8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 94 X86 :ADD r16, imm16 L: 1.08ns= 3.3c T: 1.08ns= 3.33c 95 X86 :ADD r32, imm32 L: 0.32ns= 1.0c T: 0.12ns= 0.36c 96 AMD64 :ADD r64, imm32 L: 0.32ns= 1.0c T: 0.14ns= 0.44c 97 X86 :ADD [m8], imm8 L: 2.05ns= 6.3c T: 0.16ns= 0.51c 98 X86 :ADD [m16], imm8 L: 2.05ns= 6.3c T: 0.16ns= 0.51c 99 X86 :ADD [m32], imm8 L: 2.05ns= 6.3c T: 0.16ns= 0.50c 100 AMD64 :ADD [m64], imm8 L: 2.05ns= 6.3c T: 0.19ns= 0.60c 101 X86 :ADD [m16], imm16 L: 2.02ns= 6.3c T: 1.05ns= 3.25c 102 X86 :ADD [m32], imm32 L: 2.07ns= 6.4c T: 0.19ns= 0.57c 103 AMD64 :ADD [m64], imm32 L: 2.02ns= 6.3c T: 0.20ns= 0.61c 104 X86 :ADD al, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 105 X86 :ADD ax, imm16 L: 1.05ns= 3.3c T: 1.05ns= 3.25c 106 X86 :ADD eax, imm32 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 107 AMD64 :ADD rax, imm32 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 108 X86 :SUB r8, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 109 X86 :SUB r16, r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 110 X86 :SUB r32, r32 L: 0.08ns= 0.3c T: 0.08ns= 0.25c 111 AMD64 :SUB r64, r64 L: 0.08ns= 0.3c T: 0.08ns= 0.25c 112 X86 :SUB r1_8, r2_8 L: 0.32ns= 1.0c T: 0.22ns= 0.67c 113 X86 :SUB r1_16, r2_16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 114 X86 :SUB r1_32, r2_32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 115 AMD64 :SUB r1_64, r2_64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 116 X86 :ADC r8, r8 L: 0.65ns= 2.0c T: 0.30ns= 0.92c 117 X86 :ADC r16, r16 L: 0.65ns= 2.0c T: 0.30ns= 0.92c 118 X86 :ADC r32, r32 L: 0.65ns= 2.0c T: 0.30ns= 0.92c 119 AMD64 :ADC r64, r64 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 120 X86 :SBB r8, r8 L: 0.65ns= 2.0c T: 0.30ns= 0.92c 121 X86 :SBB r16, r16 L: 0.65ns= 2.0c T: 0.30ns= 0.92c 122 X86 :SBB r32, r32 L: 0.65ns= 2.0c T: 0.30ns= 0.92c 123 AMD64 :SBB r64, r64 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 124 X86 :SBB r1_8, r2_8 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 125 X86 :SBB r1_16, r2_16 L: 0.65ns= 2.0c T: 0.30ns= 0.92c 126 X86 :SBB r1_32, r2_32 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 127 AMD64 :SBB r1_64, r2_64 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 128 X86 :CMP r8, r8 L: [no true dep.] T: 0.11ns= 0.33c 129 X86 :CMP r16, r16 L: [no true dep.] T: 0.11ns= 0.33c 130 X86 :CMP r32, r32 L: [no true dep.] T: 0.11ns= 0.33c 131 AMD64 :CMP r64, r64 L: [no true dep.] T: 0.11ns= 0.33c 132 X86 :CMP r1_8, r2_8 L: [no true dep.] T: 0.11ns= 0.33c 133 X86 :CMP r1_16, r2_16 L: [no true dep.] T: 0.11ns= 0.33c 134 X86 :CMP r1_32, r2_32 L: [no true dep.] T: 0.11ns= 0.33c 135 AMD64 :CMP r1_64, r2_64 L: [no true dep.] T: 0.11ns= 0.33c 136 X86 :AND r8, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 137 X86 :AND r16, r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 138 X86 :AND r32, r32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 139 AMD64 :AND r64, r64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 140 X86 :AND r1_8, r2_8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 141 X86 :AND r1_16, r2_16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 142 X86 :AND r1_32, r2_32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 143 AMD64 :AND r1_64, r2_64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 144 X86 :OR r8, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 145 X86 :OR r16, r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 146 X86 :OR r32, r32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 147 AMD64 :OR r64, r64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 148 X86 :OR r1_8, r2_8 L: 0.32ns= 1.0c T: 0.21ns= 0.66c 149 X86 :OR r1_16, r2_16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 150 X86 :OR r1_32, r2_32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 151 AMD64 :OR r1_64, r2_64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 152 X86 :XOR r8, r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 153 X86 :XOR r16, r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 154 X86 :XOR r32, r32 L: 0.08ns= 0.3c T: 0.08ns= 0.25c 155 AMD64 :XOR r64, r64 L: 0.08ns= 0.3c T: 0.08ns= 0.25c 156 X86 :XOR r1_8, r2_8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 157 X86 :XOR r1_16, r2_16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 158 X86 :XOR r1_32, r2_32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 159 AMD64 :XOR r1_64, r2_64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 160 X86 :NEG r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 161 X86 :NEG r16 L: 0.32ns= 1.0c T: 0.13ns= 0.39c 162 X86 :NEG r32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 163 AMD64 :NEG r64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 164 X86 :NOT r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 165 X86 :NOT r16 L: 0.32ns= 1.0c T: 0.12ns= 0.36c 166 X86 :NOT r32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 167 AMD64 :NOT r64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 168 X86 :TEST r8, r8 L: [no true dep.] T: 0.11ns= 0.33c 169 X86 :TEST r16, r16 L: [no true dep.] T: 0.11ns= 0.33c 170 X86 :TEST r32, r32 L: [no true dep.] T: 0.11ns= 0.33c 171 AMD64 :TEST r64, r64 L: [no true dep.] T: 0.11ns= 0.33c 172 X86 :TEST r1_8, r2_8 L: [no true dep.] T: 0.11ns= 0.33c 173 X86 :TEST r1_16, r2_16 L: [no true dep.] T: 0.11ns= 0.33c 174 X86 :TEST r1_32, r2_32 L: [no true dep.] T: 0.11ns= 0.33c 175 AMD64 :TEST r1_64, r2_64 L: [no true dep.] T: 0.11ns= 0.33c 176 X86 :BT r16, r16 L: [no true dep.] T: 0.32ns= 1.00c 177 X86 :BT r32, r32 L: [no true dep.] T: 0.28ns= 0.87c 178 AMD64 :BT r64, r64 L: [no true dep.] T: 0.32ns= 1.00c 179 X86 :BT r16, imm8 L: [no true dep.] T: 0.30ns= 0.92c 180 X86 :BT r32, imm8 L: [no true dep.] T: 0.32ns= 1.00c 181 AMD64 :BT r64, imm8 L: [no true dep.] T: 0.32ns= 1.00c 182 X86 :BTC r16, r16 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 183 X86 :BTC r32, r32 L: 0.32ns= 1.0c T: 0.28ns= 0.87c 184 AMD64 :BTC r64, r64 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 185 X86 :BTC r16, imm8 L: 0.32ns= 1.0c T: 0.30ns= 0.92c 186 X86 :BTC r32, imm8 L: 0.32ns= 1.0c T: 0.30ns= 0.92c 187 AMD64 :BTC r64, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 188 X86 :BTR r16, r16 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 189 X86 :BTR r32, r32 L: 0.32ns= 1.0c T: 0.28ns= 0.87c 190 AMD64 :BTR r64, r64 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 191 X86 :BTR r16, imm8 L: 0.32ns= 1.0c T: 0.30ns= 0.92c 192 X86 :BTR r32, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 193 AMD64 :BTR r64, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 194 X86 :BTS r16, r16 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 195 X86 :BTS r32, r32 L: 0.32ns= 1.0c T: 0.28ns= 0.87c 196 AMD64 :BTS r64, r64 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 197 X86 :BTS r16, imm8 L: 0.32ns= 1.0c T: 0.30ns= 0.92c 198 X86 :BTS r32, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 199 AMD64 :BTS r64, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 200 X86 :SETC r8 L: 0.32ns= 1.0c T: 0.28ns= 0.87c 201 X86 :INC r8 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 202 X86 :INC r16 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 203 X86 :INC r32 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 204 AMD64 :INC r64 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 205 X86 :LEA r16, [r16+r16] L: 0.65ns= 2.0c T: 0.32ns= 1.00c 206 X86 :LEA r32, [r32+r32] L: 0.32ns= 1.0c T: 0.16ns= 0.50c 207 AMD64 :LEA r64, [r64+r64] L: 0.32ns= 1.0c T: 0.16ns= 0.50c 208 X86 :LEA r16, [r+r+disp8] L: 1.29ns= 4.0c T: 0.32ns= 1.00c 209 X86 :LEA r32, [r+r+disp8] L: 0.97ns= 3.0c T: 0.32ns= 1.00c 210 AMD64 :LEA r64, [r+r+disp8] L: 0.97ns= 3.0c T: 0.32ns= 1.00c 211 X86 :LEA r16, [r+r*8] L: 0.65ns= 2.0c T: 0.32ns= 1.00c 212 X86 :LEA r32, [r+r*8] L: 0.32ns= 1.0c T: 0.16ns= 0.50c 213 AMD64 :LEA r64, [r+r*8] L: 0.32ns= 1.0c T: 0.16ns= 0.50c 214 X86 :LEA r16, [r+r*8+disp8] L: 1.29ns= 4.0c T: 0.32ns= 1.00c 215 X86 :LEA r32, [r+r*8+disp8] L: 0.97ns= 3.0c T: 0.32ns= 1.00c 216 AMD64 :LEA r64, [r+r*8+disp8] L: 0.97ns= 3.0c T: 0.32ns= 1.00c 217 X86 :SHL r8, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 218 X86 :SHL r16, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 219 X86 :SHL r32, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 220 AMD64 :SHL r64, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 221 X86 :SHL r8, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 222 X86 :SHL r16, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 223 X86 :SHL r32, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 224 AMD64 :SHL r64, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 225 X86 :SHL r8, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 226 X86 :SHL r16, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 227 X86 :SHL r32, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 228 AMD64 :SHL r64, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 229 X86 :SHR r8, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 230 X86 :SHR r16, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 231 X86 :SHR r32, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 232 AMD64 :SHR r64, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 233 X86 :SHR r8, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 234 X86 :SHR r16, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 235 X86 :SHR r32, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 236 AMD64 :SHR r64, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 237 X86 :SHR r8, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 238 X86 :SHR r16, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 239 X86 :SHR r32, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 240 AMD64 :SHR r64, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 241 X86 :SAR r8, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 242 X86 :SAR r16, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 243 X86 :SAR r32, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 244 AMD64 :SAR r64, 1 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 245 X86 :SAR r8, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 246 X86 :SAR r16, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 247 X86 :SAR r32, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 248 AMD64 :SAR r64, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 249 X86 :SAR r8, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 250 X86 :SAR r16, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 251 X86 :SAR r32, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 252 AMD64 :SAR r64, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 253 X86 :SHLD r16, r16, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 254 X86 :SHLD r32, r32, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 255 AMD64 :SHLD r64, r64, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 256 X86 :SHLD r16, r16, cl L: 0.70ns= 2.2c T: 0.65ns= 2.00c 257 X86 :SHLD r32, r32, cl L: 0.70ns= 2.2c T: 0.65ns= 2.00c 258 AMD64 :SHLD r64, r64, cl L: 0.70ns= 2.2c T: 0.65ns= 2.00c 259 X86 :SHRD r16, r16, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 260 X86 :SHRD r32, r32, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 261 AMD64 :SHRD r64, r64, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 262 X86 :SHRD r16, r16, cl L: 0.70ns= 2.2c T: 0.65ns= 2.00c 263 X86 :SHRD r32, r32, cl L: 0.70ns= 2.2c T: 0.65ns= 2.00c 264 AMD64 :SHRD r64, r64, cl L: 0.70ns= 2.2c T: 0.65ns= 2.00c 265 X86 :ROL r8, 1 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 266 X86 :ROL r16, 1 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 267 X86 :ROL r32, 1 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 268 AMD64 :ROL r64, 1 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 269 X86 :ROL r8, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 270 X86 :ROL r16, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 271 X86 :ROL r32, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 272 AMD64 :ROL r64, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 273 X86 :ROL r8, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 274 X86 :ROL r16, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 275 X86 :ROL r32, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 276 AMD64 :ROL r64, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 277 X86 :ROR r8, 1 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 278 X86 :ROR r16, 1 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 279 X86 :ROR r32, 1 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 280 AMD64 :ROR r64, 1 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 281 X86 :ROR r8, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 282 X86 :ROR r16, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 283 X86 :ROR r32, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 284 AMD64 :ROR r64, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 285 X86 :ROR r8, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 286 X86 :ROR r16, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 287 X86 :ROR r32, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 288 AMD64 :ROR r64, cl L: 0.65ns= 2.0c T: 0.65ns= 2.00c 289 X86 :RCL r8, 1 L: 0.67ns= 2.1c T: 0.67ns= 2.08c 290 X86 :RCL r16, 1 L: 0.67ns= 2.1c T: 0.67ns= 2.08c 291 X86 :RCL r32, 1 L: 0.67ns= 2.1c T: 0.67ns= 2.08c 292 AMD64 :RCL r64, 1 L: 0.67ns= 2.1c T: 0.67ns= 2.08c 293 X86 :RCL r8, imm8 L: 1.94ns= 6.0c T: 1.94ns= 6.00c 294 X86 :RCL r16, imm8 L: 1.94ns= 6.0c T: 1.94ns= 6.00c 295 X86 :RCL r32, imm8 L: 1.94ns= 6.0c T: 1.94ns= 6.00c 296 AMD64 :RCL r64, imm8 L: 1.94ns= 6.0c T: 1.94ns= 6.00c 297 X86 :RCL r8, cl L: 1.94ns= 6.0c T: 1.94ns= 6.00c 298 X86 :RCL r16, cl L: 1.94ns= 6.0c T: 1.94ns= 6.00c 299 X86 :RCL r32, cl L: 1.94ns= 6.0c T: 1.94ns= 6.00c 300 AMD64 :RCL r64, cl L: 1.94ns= 6.0c T: 1.94ns= 6.00c 301 X86 :RCR r8, 1 L: 0.67ns= 2.1c T: 0.67ns= 2.08c 302 X86 :RCR r16, 1 L: 0.67ns= 2.1c T: 0.67ns= 2.08c 303 X86 :RCR r32, 1 L: 0.67ns= 2.1c T: 0.67ns= 2.08c 304 AMD64 :RCR r64, 1 L: 0.67ns= 2.1c T: 0.67ns= 2.08c 305 X86 :RCR r8, imm8 L: 1.94ns= 6.0c T: 1.94ns= 6.00c 306 X86 :RCR r16, imm8 L: 1.62ns= 5.0c T: 1.62ns= 5.00c 307 X86 :RCR r32, imm8 L: 1.62ns= 5.0c T: 1.62ns= 5.00c 308 AMD64 :RCR r64, imm8 L: 1.62ns= 5.0c T: 1.62ns= 5.00c 309 X86 :RCR r8, cl L: 1.94ns= 6.0c T: 1.94ns= 6.00c 310 X86 :RCR r16, cl L: 1.62ns= 5.0c T: 1.62ns= 5.00c 311 X86 :RCR r32, cl L: 1.62ns= 5.0c T: 1.62ns= 5.00c 312 AMD64 :RCR r64, cl L: 1.62ns= 5.0c T: 1.62ns= 5.00c 313 X86 :BSF r16, r16 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 314 X86 :BSF r32, r32 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 315 AMD64 :BSF r64, r64 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 316 X86 :BSR r16, r16 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 317 X86 :BSR r32, r32 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 318 AMD64 :BSR r64, r64 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 319 X86 :BSWAP r32 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 320 AMD64 :BSWAP r64 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 327 X86 :IMUL r16, r16 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 328 X86 :IMUL r32, r32 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 329 AMD64 :IMUL r64, r64 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 330 X86 :IMUL r16, r16, imm8 L: 1.29ns= 4.0c T: 0.32ns= 1.00c 331 X86 :IMUL r32, r32, imm8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 332 AMD64 :IMUL r64, r64, imm8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 333 X86 :IMUL r16, r16, imm16 L: 1.29ns= 4.0c T: 1.05ns= 3.25c 334 X86 :IMUL r32, r32, imm32 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 335 AMD64 :IMUL r64, r64, imm32 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 336 X86 :IMUL r8 (ah) L: 1.29ns= 4.0c T: 0.97ns= 3.00c 337 X86 :IMUL r16 (dx) L: 1.70ns= 5.3c T: 1.35ns= 4.17c 338 X86 :IMUL r32 (edx) L: 1.54ns= 4.8c T: 1.45ns= 4.50c 339 AMD64 :IMUL r64 (rdx) L: 1.29ns= 4.0c T: 0.97ns= 3.00c 340 X86 :MUL r8 (ah) L: 1.29ns= 4.0c T: 0.97ns= 3.00c 341 X86 :MUL r16 (dx) L: 1.70ns= 5.3c T: 1.35ns= 4.17c 342 X86 :MUL r32 (edx) L: 1.54ns= 4.8c T: 1.45ns= 4.50c 343 AMD64 :MUL r64 (rdx) L: 1.29ns= 4.0c T: 0.97ns= 3.00c 344 X86 :IMUL r8 (al) L: 0.97ns= 3.0c T: 0.97ns= 3.00c 345 X86 :IMUL r16 (ax) L: 1.35ns= 4.2c T: 1.35ns= 4.17c 346 X86 :IMUL r32 (eax) L: 1.45ns= 4.5c T: 1.45ns= 4.50c 347 AMD64 :IMUL r64 (rax) L: 0.97ns= 3.0c T: 0.97ns= 3.00c 348 X86 :MUL r8 (al) L: 0.97ns= 3.0c T: 0.97ns= 3.00c 349 X86 :MUL r16 (ax) L: 1.35ns= 4.2c T: 1.35ns= 4.17c 350 X86 :MUL r32 (eax) L: 1.45ns= 4.5c T: 1.45ns= 4.50c 351 AMD64 :MUL r64 (rax) L: 0.97ns= 3.0c T: 0.97ns= 3.00c 352 X86 :IDIV r8 14/ 7b (full) L: 7.46ns= 23.1c T: 7.17ns= 22.17c 353 X86 :IDIV r8 12/ 7b ax upd L: 6.87ns= 21.3c T: 6.49ns= 20.08c 354 X86 :IDIV r8 7/ 7b ax upd L: 7.84ns= 24.3c T: 7.46ns= 23.08c 355 X86 :IDIV r8 4/ 7b ax upd L: [no true dep.] T: 6.49ns= 20.08c 356 X86 :IDIV r8 0/ 7b L: [no true dep.] T: 6.20ns= 19.17c 357 X86 :IDIV r8 11/ 4b ax upd L: 6.87ns= 21.3c T: 6.49ns= 20.08c 358 X86 :IDIV r8 8/ 4b ax upd L: [no true dep.] T: 6.49ns= 20.08c 359 X86 :IDIV r8 4/ 4b ax upd L: 7.84ns= 24.3c T: 7.46ns= 23.08c 360 X86 :IDIV r8 0/ 4b L: [no true dep.] T: 6.20ns= 19.17c 361 X86 :IDIV r8 2^12/2^6 ax upd L: [no true dep.] T: 6.49ns= 20.08c 362 X86 :IDIV r8 1/1 L: 6.49ns= 20.1c T: 6.20ns= 19.17c 363 X86 :IDIV r8 1/1 ax upd L: 6.87ns= 21.3c T: 6.49ns= 20.08c 364 X86 :IDIV r16 30/15b (full) L: 7.62ns= 23.6c T: 7.52ns= 23.25c 365 X86 :IDIV r16 24/15b ax upd L: 7.71ns= 23.8c T: 7.62ns= 23.58c 366 X86 :IDIV r16 15/15b ax upd L: 7.71ns= 23.8c T: 7.62ns= 23.58c 367 X86 :IDIV r16 8/15b ax/dx upd L: [no true dep.] T: 7.00ns= 21.67c 368 X86 :IDIV r16 0/15b L: [no true dep.] T: 6.55ns= 20.25c 369 X86 :IDIV r16 23/ 8b ax upd L: 7.71ns= 23.8c T: 7.62ns= 23.58c 370 X86 :IDIV r16 16/ 8b ax upd L: [no true dep.] T: 7.62ns= 23.58c 371 X86 :IDIV r16 8/ 8b ax upd L: 7.71ns= 23.8c T: 7.62ns= 23.58c 372 X86 :IDIV r16 0/ 8b L: [no true dep.] T: 6.55ns= 20.25c 373 X86 :IDIV r16 2^28/2^14 ax/dx L: [no true dep.] T: 7.97ns= 24.67c 374 X86 :IDIV r16 1/1 L: 6.65ns= 20.6c T: 6.55ns= 20.25c 375 X86 :IDIV r16 1/1 ax upd L: 6.74ns= 20.8c T: 6.65ns= 20.58c 376 X86 :IDIV r16 1/1 ax/dx upd L: 7.06ns= 21.8c T: 7.00ns= 21.67c 377 X86 :IDIV r32 62/31b (full) L: 8.59ns= 26.6c T: 8.43ns= 26.08c 378 X86 :IDIV r32 62/31b 0 rem. L: 8.59ns= 26.6c T: 8.43ns= 26.08c 379 X86 :IDIV r32 48/31b eax upd L: 7.17ns= 22.2c T: 7.17ns= 22.17c 380 X86 :IDIV r32 31/31b eax upd L: 7.17ns= 22.2c T: 7.17ns= 22.17c 381 X86 :IDIV r32 16/31b eax/edx L: [no true dep.] T: 3.56ns= 11.00c 382 X86 :IDIV r32 0/31b L: [no true dep.] T: 6.17ns= 19.08c 383 X86 :IDIV r32 47/16b eax upd L: 8.46ns= 26.2c T: 8.46ns= 26.17c 384 X86 :IDIV r32 32/16b eax upd L: [no true dep.] T: 7.17ns= 22.17c 385 X86 :IDIV r32 16/16b eax upd L: 7.17ns= 22.2c T: 7.17ns= 22.17c 386 X86 :IDIV r32 0/16b L: [no true dep.] T: 6.20ns= 19.17c 387 X86 :IDIV r32 2^60/2^30 eax/edx L: [no true dep.] T: 5.50ns= 17.00c 388 X86 :IDIV r32 1/1 L: 6.33ns= 19.6c T: 6.20ns= 19.17c 389 X86 :IDIV r32 1/1 eax upd L: 6.20ns= 19.2c T: 6.20ns= 19.17c 390 X86 :IDIV r32 1/1 eax/edx upd L: 3.56ns= 11.0c T: 3.56ns= 11.00c 391 AMD64 :IDIV r64 126/63b (full) L: 33.65ns=104.1c T: 32.73ns=101.25c 392 AMD64 :IDIV r64 126/63b 0 rem. L: 33.65ns=104.1c T: 32.73ns=101.25c 393 AMD64 :IDIV r64 96/63b rax upd L: 29.66ns= 91.8c T: 29.66ns= 91.75c 394 AMD64 :IDIV r64 63/63b rax upd L: 12.96ns= 40.1c T: 12.96ns= 40.08c 395 AMD64 :IDIV r64 32/63b rax/rdx L: [no true dep.] T: 8.08ns= 25.00c 396 AMD64 :IDIV r64 0/63b L: [no true dep.] T: 12.55ns= 38.83c 397 AMD64 :IDIV r64 95/32b rax upd L: 32.01ns= 99.0c T: 32.01ns= 99.00c 398 AMD64 :IDIV r64 64/32b rax upd L: [no true dep.] T: 14.28ns= 44.17c 399 AMD64 :IDIV r64 32/32b rax upd L: 12.96ns= 40.1c T: 12.96ns= 40.08c 400 AMD64 :IDIV r64 0/32b L: [no true dep.] T: 12.55ns= 38.83c 401 AMD64 :IDIV r64 2^124/2^62 rax/rdx L: [no true dep.] T: 27.35ns= 84.58c 402 AMD64 :IDIV r64 1/1 L: 13.28ns= 41.1c T: 12.55ns= 38.83c 403 AMD64 :IDIV r64 1/1 rax upd L: 11.96ns= 37.0c T: 11.96ns= 37.00c 404 AMD64 :IDIV r64 1/1 rax/rdx upd L: 8.11ns= 25.1c T: 8.11ns= 25.08c 405 X86 :DIV r8 16/ 8b (full) L: 7.41ns= 22.9c T: 6.82ns= 21.08c 406 X86 :DIV r8 12/ 8b ax upd L: 6.57ns= 20.3c T: 6.20ns= 19.17c 407 X86 :DIV r8 8/ 8b ax upd L: 7.54ns= 23.3c T: 7.17ns= 22.17c 408 X86 :DIV r8 4/ 8b ax upd L: [no true dep.] T: 6.20ns= 19.17c 409 X86 :DIV r8 0/ 8b L: [no true dep.] T: 5.85ns= 18.08c 410 X86 :DIV r8 12/ 4b ax upd L: 6.57ns= 20.3c T: 6.20ns= 19.17c 411 X86 :DIV r8 8/ 4b ax upd L: [no true dep.] T: 6.20ns= 19.17c 412 X86 :DIV r8 4/ 4b ax upd L: 7.54ns= 23.3c T: 7.17ns= 22.17c 413 X86 :DIV r8 0/ 4b L: [no true dep.] T: 5.85ns= 18.08c 414 X86 :DIV r8 2^14/2^7 ax upd L: [no true dep.] T: 6.20ns= 19.17c 415 X86 :DIV r8 1/1 L: 6.44ns= 19.9c T: 5.85ns= 18.08c 416 X86 :DIV r8 1/1 ax upd L: 6.57ns= 20.3c T: 6.20ns= 19.17c 417 X86 :DIV r16 32/16b (full) L: 7.62ns= 23.6c T: 7.52ns= 23.25c 418 X86 :DIV r16 30/15b 0 rem. L: 7.62ns= 23.6c T: 7.52ns= 23.25c 419 X86 :DIV r16 24/16b ax upd L: 7.65ns= 23.7c T: 7.60ns= 23.50c 420 X86 :DIV r16 16/16b ax upd L: 7.65ns= 23.7c T: 7.60ns= 23.50c 421 X86 :DIV r16 8/16b ax/dx upd L: [no true dep.] T: 6.98ns= 21.58c 422 X86 :DIV r16 0/16b L: [no true dep.] T: 6.55ns= 20.25c 423 X86 :DIV r16 24/ 8b ax upd L: 7.65ns= 23.7c T: 7.60ns= 23.50c 424 X86 :DIV r16 16/ 8b ax upd L: [no true dep.] T: 7.60ns= 23.50c 425 X86 :DIV r16 8/ 8b ax upd L: 7.65ns= 23.7c T: 7.60ns= 23.50c 426 X86 :DIV r16 0/ 8b L: [no true dep.] T: 6.55ns= 20.25c 427 X86 :DIV r16 1/1 L: 6.65ns= 20.6c T: 6.55ns= 20.25c 428 X86 :DIV r16 1/1 ax upd L: 6.68ns= 20.7c T: 6.63ns= 20.50c 429 X86 :DIV r16 1/1 ax/dx upd L: 7.14ns= 22.1c T: 6.98ns= 21.58c 430 X86 :DIV r32 64/32b (full) L: 8.54ns= 26.4c T: 8.43ns= 26.08c 431 X86 :DIV r32 62/31b 0 rem. L: 8.54ns= 26.4c T: 8.43ns= 26.08c 432 X86 :DIV r32 48/32b eax upd L: 7.14ns= 22.1c T: 7.14ns= 22.08c 433 X86 :DIV r32 32/32b eax upd L: 7.14ns= 22.1c T: 7.14ns= 22.08c 434 X86 :DIV r32 16/32b eax/edx L: [no true dep.] T: 3.56ns= 11.00c 435 X86 :DIV r32 0/32b L: [no true dep.] T: 6.17ns= 19.08c 436 X86 :DIV r32 48/16b eax upd L: 8.43ns= 26.1c T: 8.43ns= 26.08c 437 X86 :DIV r32 32/16b eax upd L: [no true dep.] T: 7.14ns= 22.08c 438 X86 :DIV r32 16/16b eax upd L: 7.14ns= 22.1c T: 7.14ns= 22.08c 439 X86 :DIV r32 0/16b L: [no true dep.] T: 6.17ns= 19.08c 440 X86 :DIV r32 2^62/2^31 eax/edx L: [no true dep.] T: 5.82ns= 18.00c 441 X86 :DIV r32 1/1 L: 6.28ns= 19.4c T: 6.17ns= 19.08c 442 X86 :DIV r32 1/1 eax upd L: 6.17ns= 19.1c T: 6.17ns= 19.08c 443 X86 :DIV r32 1/1 eax/edx upd L: 3.56ns= 11.0c T: 3.56ns= 11.00c 444 AMD64 :DIV r64 128/64b (full) L: 30.82ns= 95.3c T: 29.82ns= 92.25c 445 AMD64 :DIV r64 126/63b 0 rem. L: 30.82ns= 95.3c T: 29.82ns= 92.25c 446 AMD64 :DIV r64 96/64b rax upd L: 26.08ns= 80.7c T: 26.08ns= 80.67c 447 AMD64 :DIV r64 64/64b rax upd L: 7.14ns= 22.1c T: 7.11ns= 22.00c 448 AMD64 :DIV r64 32/64b rax/rdx L: [no true dep.] T: 7.17ns= 22.17c 449 AMD64 :DIV r64 0/64b L: [no true dep.] T: 9.46ns= 29.25c 450 AMD64 :DIV r64 96/32b rax upd L: 24.98ns= 77.3c T: 24.98ns= 77.25c 451 AMD64 :DIV r64 64/32b rax upd L: [no true dep.] T: 7.38ns= 22.83c 452 AMD64 :DIV r64 32/32b rax upd L: 7.14ns= 22.1c T: 7.11ns= 22.00c 453 AMD64 :DIV r64 0/32b L: [no true dep.] T: 9.46ns= 29.25c 454 AMD64 :DIV r64 2^126/2^63 rax/rdx L: [no true dep.] T: 24.89ns= 77.00c 455 AMD64 :DIV r64 1/1 L: 10.26ns= 31.8c T: 9.46ns= 29.25c 456 AMD64 :DIV r64 1/1 rax upd L: 7.22ns= 22.3c T: 7.19ns= 22.25c 457 AMD64 :DIV r64 1/1 rax/rdx upd L: 7.17ns= 22.2c T: 7.17ns= 22.17c 458 X86 :CBW L: 0.32ns= 1.0c T: 0.32ns= 1.00c 459 X86 :CWDE L: 0.32ns= 1.0c T: 0.32ns= 1.00c 460 AMD64 :CDQE L: 0.32ns= 1.0c T: 0.32ns= 1.00c 461 X86 :CWD L: 0.32ns= 1.0c T: 0.32ns= 1.00c 462 X86 :CDQ L: 0.32ns= 1.0c T: 0.32ns= 1.00c 463 AMD64 :CQO L: 0.17ns= 0.5c T: 0.17ns= 0.52c 464 X86 :CLC L: 0.08ns= 0.3c T: 0.08ns= 0.25c 465 X86 :STC L: 0.11ns= 0.3c T: 0.11ns= 0.33c 466 X86 :CMC L: 0.29ns= 0.9c T: 0.29ns= 0.89c 467 X86 :CLD L: 1.29ns= 4.0c T: 1.29ns= 4.00c 468 X86 :STD L: 1.29ns= 4.0c T: 1.29ns= 4.00c 475 L/SAHF:LAHF L: 0.32ns= 1.0c T: 0.32ns= 1.00c 476 L/SAHF:SAHF L: 0.54ns= 1.7c T: 0.54ns= 1.67c 483 X86 :PUSH r16 L: [no true dep.] T: 0.32ns= 1.00c 484 X86 :POP r16 L: [no true dep.] T: 0.18ns= 0.57c 485 X86 :PUSH r16 + POP r16 L: 2.05ns= 6.3c T: 0.27ns= 0.82c 486 AMD64 :PUSH r64 L: [no true dep.] T: 0.32ns= 1.00c 487 AMD64 :POP r64 L: [no true dep.] T: 0.16ns= 0.50c 488 AMD64 :PUSH r64 + POP r64 L: 1.86ns= 5.8c T: 0.20ns= 0.61c 489 AMD64 :PUSH imm8 L: [no true dep.] T: 0.32ns= 1.00c 490 AMD64 :PUSH imm8 + POP r64 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 491 AMD64 :PUSH imm32 L: [no true dep.] T: 0.32ns= 1.00c 492 AMD64 :PUSH imm32 + POP r64 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 493 X86 :PUSH [m16] L: [no true dep.] T: 0.32ns= 1.00c 494 X86 :POP [m16] L: [no true dep.] T: 0.32ns= 1.00c 495 X86 :PUSH [m16] + POP [m16] L: 3.39ns= 10.5c T: 0.59ns= 1.83c 496 AMD64 :PUSH [m64] L: [no true dep.] T: 0.32ns= 1.00c 497 AMD64 :POP [m64] L: [no true dep.] T: 0.32ns= 1.00c 498 AMD64 :PUSH [m64] + POP [m64] L: 3.39ns= 10.5c T: 0.59ns= 1.83c 499 X86 :PUSHF L: [no true dep.] T: 0.32ns= 1.00c 501 X86 :PUSHF + POPF L: 7.44ns= 23.0c T: 7.44ns= 23.00c 502 AMD64 :PUSHFQ L: [no true dep.] T: 0.32ns= 1.00c 504 AMD64 :PUSHFQ + POPFQ L: 7.44ns= 23.0c T: 7.44ns= 23.00c 505 X86 :CMPSB L: 1.29ns= 4.0c T: 1.29ns= 4.00c 506 X86 :CMPSW L: 1.29ns= 4.0c T: 1.29ns= 4.00c 507 X86 :CMPSD L: 1.29ns= 4.0c T: 1.29ns= 4.00c 508 AMD64 :CMPSQ L: 1.29ns= 4.0c T: 1.29ns= 4.00c 509 X86 :REPE CMPSB BW in L1D: 0.99 B/c 3074MiB/s 510 X86 :REPE CMPSW BW in L1D: 1.98 B/c 6124MiB/s 511 X86 :REPE CMPSD BW in L1D: 3.93 B/c 12144MiB/s 512 AMD64 :REPE CMPSQ BW in L1D: 7.75 B/c 23972MiB/s 513 X86 :LODSB L: 0.40ns= 1.3c T: 0.40ns= 1.25c 514 X86 :LODSW L: 0.40ns= 1.3c T: 0.40ns= 1.25c 515 X86 :LODSD L: 0.32ns= 1.0c T: 0.32ns= 1.00c 516 AMD64 :LODSQ L: 0.35ns= 1.1c T: 0.35ns= 1.08c 517 X86 :REP LODSB BW in L1D: 0.50 B/c 1545MiB/s 518 X86 :REP LODSW BW in L1D: 1.00 B/c 3089MiB/s 519 X86 :REP LODSD BW in L1D: 1.99 B/c 6169MiB/s 520 AMD64 :REP LODSQ BW in L1D: 3.98 B/c 12306MiB/s 521 X86 :STOSB L: 0.32ns= 1.0c T: 0.32ns= 1.00c 522 X86 :STOSW L: 0.32ns= 1.0c T: 0.38ns= 1.17c 523 X86 :STOSD L: 0.32ns= 1.0c T: 0.35ns= 1.08c 524 AMD64 :STOSQ L: 0.38ns= 1.2c T: 0.38ns= 1.17c 525 X86 :REP STOSB BW in L1D:14.41 B/c 44571MiB/s 526 X86 :REP STOSW BW in L1D: 9.79 B/c 30282MiB/s 527 X86 :REP STOSD BW in L1D:15.08 B/c 46642MiB/s 528 AMD64 :REP STOSQ BW in L1D:15.09 B/c 46664MiB/s 529 X86 :MOVSB L: 1.29ns= 4.0c T: 1.29ns= 4.00c 530 X86 :MOVSW L: 1.29ns= 4.0c T: 1.29ns= 4.00c 531 X86 :MOVSD L: 1.29ns= 4.0c T: 1.29ns= 4.00c 532 AMD64 :MOVSQ L: 1.29ns= 4.0c T: 1.29ns= 4.00c 533 X86 :REP MOVSB BW in L1D:25.48 B/c 78813MiB/s 534 X86 :REP MOVSW BW in L1D:18.07 B/c 55904MiB/s 535 X86 :REP MOVSD BW in L1D:27.44 B/c 84886MiB/s 536 AMD64 :REP MOVSQ BW in L1D:27.70 B/c 85675MiB/s 537 X86 :SCASB L: 0.40ns= 1.3c T: 0.40ns= 1.25c 538 X86 :SCASW L: 0.40ns= 1.3c T: 0.40ns= 1.25c 539 X86 :SCASD L: 0.40ns= 1.3c T: 0.43ns= 1.33c 540 AMD64 :SCASQ L: 0.48ns= 1.5c T: 0.46ns= 1.42c 541 X86 :REPNE SCASB BW in L1D: 0.50 B/c 1545MiB/s 542 X86 :REPNE SCASW BW in L1D: 1.00 B/c 3088MiB/s 543 X86 :REPNE SCASD BW in L1D: 1.99 B/c 6162MiB/s 544 AMD64 :REPNE SCASQ BW in L1D: 3.97 B/c 12276MiB/s 545 X86 :XADD r8, r8 L: 0.70ns= 2.2c T: 0.32ns= 1.00c 546 X86 :XADD r16, r16 L: 0.70ns= 2.2c T: 0.32ns= 1.00c 547 X86 :XADD r32, r32 L: 0.70ns= 2.2c T: 0.32ns= 1.00c 548 AMD64 :XADD r64, r64 L: 0.70ns= 2.2c T: 0.32ns= 1.00c 549 X86 :CMPXCHG r8, r8 L: 1.62ns= 5.0c T: 1.62ns= 5.00c 550 X86 :CMPXCHG r16, r16 L: 1.62ns= 5.0c T: 1.62ns= 5.00c 551 X86 :CMPXCHG r32, r32 L: 1.62ns= 5.0c T: 1.62ns= 5.00c 552 AMD64 :CMPXCHG r64, r64 L: 1.62ns= 5.0c T: 1.62ns= 5.00c 553 CMPX8 :CMPXCHG8B L: 2.26ns= 7.0c T: 2.26ns= 7.00c 554 CMPX16:CMPXCHG16B L: 5.09ns= 15.8c T: 2.91ns= 9.00c 555 X86 :RDTSC L: [no true dep.] T: 9.05ns= 28.00c 556 X86 :CPUID (EAX = 0) L: 31.09ns= 96.2c T: 31.09ns= 96.17c 557 X86 :CPUID (EAX = 1) L: 108.41ns=335.3c T: 108.41ns=335.33c 558 POPCNT:POPCNT r16, r16 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 559 POPCNT:POPCNT r32, r32 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 560 POPCNT:POPCNT r64, r64 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 564 SSE4.2:CRC32 r32, r8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 565 SSE4.2:CRC32 r32, r16 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 566 SSE4.2:CRC32 r32, r32 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 567 SSE4.2:CRC32 r64, r8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 568 SSE4.2:CRC32 r64, r16 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 569 X87 :FNOP L: [no true dep.] T: 0.32ns= 1.00c 570 X87 :FXCH st(i) L: 0.16ns= 0.5c T: 0.16ns= 0.50c 571 X87 :FCHS L: 0.32ns= 1.0c T: 0.32ns= 1.00c 572 X87 :FABS L: 0.32ns= 1.0c T: 0.32ns= 1.00c 573 X87 :FTST L: [no true dep.] T: 0.32ns= 1.00c 574 X87 :FXAM L: [no true dep.] T: 0.65ns= 2.00c 575 CMOV :FCMOVE st, st(i) L: 0.65ns= 2.0c T: 0.65ns= 2.00c 576 X87 :FADD st(i), st (st = 0.0) L: 0.97ns= 3.0c T: 0.32ns= 1.00c 577 X87 :FADD st(i), st L: 0.97ns= 3.0c T: 0.32ns= 1.00c 578 X87 :FADD st, st(i), FXCH st(i) L: 0.97ns= 3.0c T: 0.32ns= 1.00c 579 X87 :FMUL st(i), st (st = 0.0) L: 1.62ns= 5.0c T: 0.32ns= 1.00c 580 X87 :FMUL st(i), st L: 1.62ns= 5.0c T: 0.32ns= 1.00c 581 X87 :FMUL st, st(i), FXCH st(i) L: 1.62ns= 5.0c T: 0.32ns= 1.00c 582 X87 :FMUL + FADD st, st(i) L: 2.59ns= 8.0c T: [not enough reg] 583 X87 :FMUL st(2i) FADD st(2i+1) L: 1.62ns= 5.0c T: [not enough reg] 584 X87 :FDIV32 st(i), st L: 4.55ns= 14.1c T: 4.53ns= 14.00c 585 X87 :FDIV64 st(i), st L: 7.14ns= 22.1c T: 7.11ns= 22.00c 586 X87 :FDIV80 st(i), st L: 7.79ns= 24.1c T: 7.76ns= 24.00c 587 X87 :FDIV80 (0.0l/x) L: 3.26ns= 10.1c T: 3.23ns= 10.00c 588 X87 :FDIV80 (x/1.0l) L: 3.26ns= 10.1c T: 3.23ns= 10.00c 589 X87 :FDIV80 (x/2.0l) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 590 X87 :FDIV80 (x/0.5l) L: 3.26ns= 10.1c T: 3.21ns= 9.92c 591 X87 :FSQRT32 st L: 4.55ns= 14.1c T: 4.53ns= 14.00c 592 X87 :FSQRT64 st L: 6.92ns= 21.4c T: 6.79ns= 21.00c 593 X87 :FSQRT80 st L: 7.76ns= 24.0c T: 7.76ns= 24.00c 594 X87 :FSQRT80 (0.0l) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 595 X87 :FSQRT80 (1.0l) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 596 X87 :FDECSTP L: [no true dep.] T: 0.32ns= 1.00c 597 X87 :FINCSTP L: [no true dep.] T: 0.32ns= 1.00c 598 X87 :FCOM st(i) L: [no true dep.] T: 0.32ns= 1.00c 599 CMOV :FCOMI st, st(i) L: [no true dep.] T: 0.32ns= 1.00c 600 X87 :FSIN80 (0.0) L: 15.79ns= 48.8c T: 16.11ns= 49.83c 601 X87 :FSIN80 (0.0) + FADD L: 16.11ns= 49.8c T: 16.17ns= 50.00c 602 X87 :FSIN80 (1.0) + FADD L: 37.50ns=116.0c T: 37.56ns=116.17c 603 X87 :FSIN80 (4Pi) + FADD L: 28.94ns= 89.5c T: 26.73ns= 82.67c 604 X87 :FSIN80 (2Pi) + FADD L: 28.94ns= 89.5c T: 26.73ns= 82.67c 605 X87 :FSIN80 (Pi) + FADD L: 28.94ns= 89.5c T: 26.73ns= 82.67c 606 X87 :FSIN80 (Pi/2) + FADD L: 33.81ns=104.6c T: 31.58ns= 97.67c 607 X87 :FSIN80 (Pi/4) + FADD L: 36.53ns=113.0c T: 36.61ns=113.25c 608 X87 :FSIN80 (Pi/8) + FADD L: 32.01ns= 99.0c T: 32.01ns= 99.00c 609 X87 :FSIN80 (Pi/16) + FADD L: 27.97ns= 86.5c T: 25.76ns= 79.67c 610 X87 :FSIN80 (Pi/32) + FADD L: 27.97ns= 86.5c T: 25.76ns= 79.67c 611 X87 :FCOS80 (0.73908513...) L: 37.18ns=115.0c T: 37.83ns=117.00c 612 X87 :FCOS80 (0.73908513...)+FADD L: 37.83ns=117.0c T: 37.83ns=117.00c 613 X87 :FCOS80 (0.0) + FADD L: 16.11ns= 49.8c T: 16.17ns= 50.00c 614 X87 :FCOS80 (1.0) + FADD L: 33.95ns=105.0c T: 33.95ns=105.00c 615 X87 :FCOS80 (4Pi) + FADD L: 32.55ns=100.7c T: 31.28ns= 96.75c 616 X87 :FCOS80 (2Pi) + FADD L: 32.52ns=100.6c T: 31.28ns= 96.75c 617 X87 :FCOS80 (Pi) + FADD L: 32.55ns=100.7c T: 31.28ns= 96.75c 618 X87 :FCOS80 (Pi/2) + FADD L: 28.61ns= 88.5c T: 26.67ns= 82.50c 619 X87 :FCOS80 (Pi/4) + FADD L: 33.30ns=103.0c T: 33.30ns=103.00c 620 X87 :FCOS80 (Pi/8) + FADD L: 37.83ns=117.0c T: 37.83ns=117.00c 621 X87 :FCOS80 (Pi/16) + FADD L: 31.55ns= 97.6c T: 30.55ns= 94.50c 622 X87 :FCOS80 (Pi/32) + FADD L: 31.55ns= 97.6c T: 30.55ns= 94.50c 623 MMX :EMMS L: 5.82ns= 18.0c T: 5.82ns= 18.00c 624 MMX :MOVD r32, mm L: [diff. reg. set] T: 0.32ns= 1.00c 625 MMX :MOVD mm, r32 L: [diff. reg. set] T: 0.32ns= 1.00c 626 MMX :MOVD r32, mm+MOVD mm, r32 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 627 AMD64 :MOVD r64, mm L: [diff. reg. set] T: 0.32ns= 1.00c 628 AMD64 :MOVD mm, r64 L: [diff. reg. set] T: 0.32ns= 1.00c 629 AMD64 :MOVD r64, mm+MOVD mm, r64 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 630 MMX :MOVD mm, [m32] L: [memory dep.] T: 0.16ns= 0.50c 631 MMX :MOVD [m32], mm L: [memory dep.] T: 0.32ns= 1.00c 632 MMX :MOVD mm,[m32]+MOVD [m32],mm L: 1.94ns= 6.0c T: 0.30ns= 0.92c 633 MMX :MOVQ mm, mm L: 0.32ns= 1.0c T: 0.11ns= 0.33c 634 MMX :MOVQ mm, [m64] L: [memory dep.] T: 0.16ns= 0.50c 635 MMX :MOVQ [m64], mm L: [memory dep.] T: 0.32ns= 1.00c 636 MMX :MOVQ mm,[m64]+MOVQ [m64],mm L: 2.18ns= 6.8c T: 0.30ns= 0.92c 637 SSE :MOVNTQ [m64], mm L: [memory dep.] T: 1.00ns= 1.00c 638 SSE :PMOVMSKB r32, mm L: [diff. reg. set] T: 0.32ns= 1.00c 639 AMD64 :PMOVMSKB r64, mm L: [diff. reg. set] T: 0.32ns= 1.00c 640 SSE :MASKMOVQ mm, mm L: [memory dep.] T: 1.00ns= 1.00c 641 MMX :PADDB mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 642 MMX :PADDW mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 643 MMX :PADDD mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 644 SSE2 :PADDQ mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 645 MMX :PADDSB mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 646 MMX :PADDSW mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 647 MMX :PADDUSB mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 648 MMX :PADDUSW mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 649 MMX :PSUBB mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 650 MMX :PSUBB mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 651 MMX :PSUBW mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 652 MMX :PSUBW mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 653 MMX :PSUBD mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 654 MMX :PSUBD mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 655 SSE2 :PSUBQ mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 656 SSE2 :PSUBQ mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 657 MMX :PSUBSB mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 658 MMX :PSUBSB mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 659 MMX :PSUBSW mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 660 MMX :PSUBSW mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 661 MMX :PSUBUSB mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 662 MMX :PSUBUSB mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 663 MMX :PSUBUSW mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 664 MMX :PSUBUSW mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 665 MMX :PCMPEQB mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 666 MMX :PCMPEQB mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 667 MMX :PCMPEQW mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 668 MMX :PCMPEQW mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 669 MMX :PCMPEQD mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 670 MMX :PCMPEQD mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 671 MMX :PCMPGTB mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 672 MMX :PCMPGTB mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 673 MMX :PCMPGTW mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 674 MMX :PCMPGTW mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 675 MMX :PCMPGTD mm, mm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 676 MMX :PCMPGTD mm_1, mm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 677 MMX :PAND mm, mm L: 0.32ns= 1.0c T: 0.11ns= 0.33c 678 MMX :PAND mm_1, mm_2 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 679 MMX :PANDN mm, mm L: 0.32ns= 1.0c T: 0.11ns= 0.33c 680 MMX :PANDN mm_1, mm_2 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 681 MMX :POR mm, mm L: 0.32ns= 1.0c T: 0.11ns= 0.33c 682 MMX :POR mm_1, mm_2 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 683 MMX :PXOR mm, mm L: 0.11ns= 0.3c T: 0.11ns= 0.33c 684 MMX :PXOR mm_1, mm_2 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 685 MMX :PMULHW mm, mm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 686 SSE :PMULHUW mm, mm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 688 SSSE3 :PMULHRSW mm, mm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 689 MMX :PMULLW mm, mm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 690 SSE2 :PMULUDQ mm, mm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 691 SSSE3 :PMADDUBSW mm, mm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 692 MMX :PMADDWD mm, mm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 693 MMX :PSLLW mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 694 MMX :PSLLW mm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 695 MMX :PSLLD mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 696 MMX :PSLLD mm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 697 MMX :PSLLQ mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 698 MMX :PSLLQ mm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 699 MMX :PSRAW mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 700 MMX :PSRAW mm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 701 MMX :PSRAD mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 702 MMX :PSRAD mm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 703 MMX :PSRLW mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 704 MMX :PSRLW mm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 705 MMX :PSRLD mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 706 MMX :PSRLD mm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 707 MMX :PSRLQ mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 708 MMX :PSRLQ mm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 709 MMX :PUNPCKHBW mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 710 MMX :PUNPCKHWD mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 711 MMX :PUNPCKHDQ mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 712 MMX :PUNPCKLBW mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 713 MMX :PUNPCKLWD mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 714 MMX :PUNPCKLDQ mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 715 MMX :PACKSSWB mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 716 MMX :PACKUSWB mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 717 MMX :PACKSSDW mm, mm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 753 SSE :PAVGB mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 754 SSE :PAVGW mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 755 SSE :PEXTRW r32, mm, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 756 SSE :PINSRW mm, r32, im8 L: [diff. reg. set] T: 0.35ns= 1.08c 757 SSE :PEXTRW + PINSRW r32 L: 0.48ns= 1.5c T: 0.48ns= 1.50c 758 AMD64 :PEXTRW r64, mm, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 759 AMD64 :PINSRW mm, r64, im8 L: [diff. reg. set] T: 0.35ns= 1.08c 760 AMD64 :PEXTRW + PINSRW r64 L: 0.51ns= 1.6c T: 0.51ns= 1.58c 761 SSE :PMAXSW mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 762 SSE :PMAXUB mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 763 SSE :PMINSW mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 764 SSE :PMINUB mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 765 SSE :PSADBW mm, mm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 766 SSE :PSHUFW mm, mm, im8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 767 SSE :PREFETCHNTA [mem] L: [memory dep.] T: 0.32ns= 1.00c 768 SSE :PREFETCHT0 [mem] L: [memory dep.] T: 0.32ns= 1.00c 769 SSE :PREFETCHT1 [mem] L: [memory dep.] T: 0.32ns= 1.00c 770 SSE :PREFETCHT2 [mem] L: [memory dep.] T: 0.32ns= 1.00c 771 SSE :SFENCE L: 1.94ns= 6.0c T: 1.94ns= 6.00c 772 SSE2 :LFENCE L: 1.37ns= 4.3c T: 1.37ns= 4.25c 773 SSE2 :MFENCE L: 10.75ns= 33.3c T: 10.75ns= 33.25c 774 SSSE3 :PABSB mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 775 SSSE3 :PABSW mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 776 SSSE3 :PABSD mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 777 SSSE3 :PALIGNR mm, mm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 778 SSSE3 :PHADDW mm, mm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 779 SSSE3 :PHADDD mm, mm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 780 SSSE3 :PHADDSW mm, mm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 781 SSSE3 :PHSUBW mm, mm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 782 SSSE3 :PHSUBD mm, mm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 783 SSSE3 :PHSUBSW mm, mm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 784 SSSE3 :PSHUFB mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 785 SSSE3 :PSIGNB mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 786 SSSE3 :PSIGNW mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 787 SSSE3 :PSIGND mm, mm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 788 SSE :MOVHLPS xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 789 SSE :MOVHLPS xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 790 SSE :MOVSS xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 791 SSE :MOVSS xmm, [m32] L: [memory dep.] T: 0.16ns= 0.50c 792 SSE :MOVSS [m32], xmm L: [memory dep.] T: 0.32ns= 1.00c 793 SSE :MOVSS LS pair L: 2.21ns= 6.8c T: 0.28ns= 0.85c 794 SSE :MOVLPS xmm, [m32] L: [memory dep.] T: 0.32ns= 1.00c 795 SSE :MOVLPS [m32], xmm L: [memory dep.] T: 0.32ns= 1.00c 796 SSE :MOVLPS LS pair L: 2.32ns= 7.2c T: 0.12ns= 0.37c 797 SSE :MOVHPS xmm, [m32] L: [memory dep.] T: 0.32ns= 1.00c 798 SSE :MOVHPS [m32], xmm L: [memory dep.] T: 0.32ns= 1.00c 799 SSE :MOVHPS LS pair L: 2.29ns= 7.1c T: 0.12ns= 0.38c 800 SSE :MOVAPS xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 801 SSE :MOVAPS xmm, [m128] L: [memory dep.] T: 0.16ns= 0.50c 802 SSE :MOVAPS [m128], xmm L: [memory dep.] T: 0.32ns= 1.00c 803 SSE :MOVAPS LS pair L: 1.94ns= 6.0c T: 0.08ns= 0.24c 804 SSE :MOVUPS xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 805 SSE :MOVUPS xmm, [m128] L: [memory dep.] T: 0.16ns= 0.50c 806 SSE :MOVUPS [m128], xmm L: [memory dep.] T: 0.32ns= 1.00c 807 SSE :MOVUPS aligned LS pair L: 2.13ns= 6.6c T: 0.08ns= 0.24c 808 SSE :MOVUPS xmm, [m128 + 4] L: [memory dep.] T: 0.15ns= 0.47c 809 SSE :MOVUPS [m128 + 4], xmm L: [memory dep.] T: 0.32ns= 1.00c 810 SSE :MOVUPS unaligned LS pair L: 1.94ns= 6.0c T: 0.32ns= 1.00c 812 SSE :MOVNTPS [m128], xmm L: [memory dep.] T: 1.00ns= 1.00c 813 SSE :MOVMSKPS r32, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 814 SSE :UNPCKLPS xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 815 SSE :UNPCKHPS xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 816 SSE :SHUFPS xmm, xmm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 817 SSE :COMISS xmm, xmm L: [no true dep.] T: 0.32ns= 1.00c 818 SSE :UCOMISS xmm, xmm L: [no true dep.] T: 0.32ns= 1.00c 819 SSE :CMPSS xmm, xmm, imm8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 820 SSE :CMPPS xmm, xmm, imm8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 821 SSE :SUBSS xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 822 SSE :SUBPS xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 823 SSE :ADDSS xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 824 SSE :ADDPS xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 825 SSE :MULSS xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 826 SSE :MULPS xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 827 SSE :MULSS+ADDSS xmm, xmm L: 2.59ns= 8.0c T: 0.38ns= 1.17c 828 SSE :MULPS+ADDPS xmm, xmm L: 2.59ns= 8.0c T: 0.32ns= 1.00c 829 SSE :MULSS xm1,xm1 ADDSS xm2,xm2 L: 1.62ns= 5.0c T: 0.32ns= 1.00c 830 SSE :MULPS xm1,xm1 ADDPS xm2,xm2 L: 1.62ns= 5.0c T: 0.97ns= 3.00c 831 SSE :MAXSS xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 832 SSE :MAXPS xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 833 SSE :MINSS xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 834 SSE :MINPS xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 835 SSE :ANDNPS xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 836 SSE :ANDNPS xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 837 SSE :ANDPS xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 838 SSE :ANDPS xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 839 SSE :ORPS xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 840 SSE :ORPS xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 841 SSE :XORPS xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 842 SSE :XORPS xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 843 SSE :DIVSS xmm, xmm L: 4.55ns= 14.1c T: 4.50ns= 13.92c 844 SSE :DIVSS (0.0f/x) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 845 SSE :DIVSS (x/1.0f) L: 3.26ns= 10.1c T: 3.23ns= 10.00c 846 SSE :DIVSS (x/2.0f) L: 3.23ns= 10.0c T: 3.26ns= 10.08c 847 SSE :DIVSS (x/0.5f) L: 3.23ns= 10.0c T: 3.26ns= 10.08c 848 SSE :DIVPS xmm, xmm L: 4.55ns= 14.1c T: 4.53ns= 14.00c 849 SSE :DIVPS (0.0f/x) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 850 SSE :DIVPS (x/1.0f) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 851 SSE :DIVPS (x/2.0f) L: 3.26ns= 10.1c T: 3.21ns= 9.92c 852 SSE :DIVPS (x/0.5f) L: 3.26ns= 10.1c T: 3.21ns= 9.92c 853 SSE :SQRTSS xmm, xmm L: 4.53ns= 14.0c T: 4.53ns= 14.00c 854 SSE :SQRTSS (0.0f) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 855 SSE :SQRTSS (1.0f) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 856 SSE :SQRTPS xmm, xmm L: 4.53ns= 14.0c T: 4.53ns= 14.00c 857 SSE :SQRTPS (0.0f) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 858 SSE :SQRTPS (1.0f) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 859 SSE :RCPSS xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 860 SSE :RCPPS xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 861 SSE :RSQRTSS xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 862 SSE :RSQRTPS xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 863 SSE :CVTPI2PS xmm, mm L: [diff. reg. set] T: 0.32ns= 1.00c 864 SSE :CVTPS2PI mm, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 865 SSE :CVTPS2PI + CVTPI2PS L: 2.59ns= 8.0c T: 0.65ns= 2.00c 866 SSE :CVTTPS2PI mm, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 867 SSE :CVTTPS2PI + CVTPI2PS L: 2.59ns= 8.0c T: 0.65ns= 2.00c 868 SSE :CVTSI2SS xmm, r32 L: [diff. reg. set] T: 0.32ns= 1.00c 869 SSE :CVTSS2SI r32, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 870 SSE :CVTSS2SI + CVTSI2SS r32 L: 2.59ns= 8.0c T: 0.65ns= 2.00c 871 SSE :CVTTSS2SI r32, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 872 SSE :CVTTSS2SI + CVTSI2SS r32 L: 2.59ns= 8.0c T: 0.65ns= 2.00c 873 AMD64 :CVTSI2SS xmm, r64 L: [diff. reg. set] T: 0.65ns= 2.00c 874 AMD64 :CVTSS2SI r64, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 875 AMD64 :CVTSS2SI + CVTSI2SS r64 L: 2.91ns= 9.0c T: 0.65ns= 2.00c 876 AMD64 :CVTTSS2SI r64, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 877 AMD64 :CVTTSS2SI + CVTSI2SS r64 L: 2.91ns= 9.0c T: 0.65ns= 2.00c 878 SSE :STMXCSR [mem] L: [memory dep.] T: 0.32ns= 1.00c 879 SSE :LDMXCSR [mem] L: [memory dep.] T: 0.75ns= 2.33c 880 SSE :STMXCSR + LDMXCSR L: 4.20ns= 13.0c T: 4.20ns= 13.00c 881 SSE2 :MOVSD xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 882 SSE2 :MOVSD xmm, [m64] L: [memory dep.] T: 0.16ns= 0.50c 883 SSE2 :MOVSD [m64], xmm L: [memory dep.] T: 0.32ns= 1.00c 884 SSE2 :MOVSD LS pair L: 2.10ns= 6.5c T: 0.26ns= 0.81c 885 SSE2 :MOVLPD xmm, [m64] L: [memory dep.] T: 0.32ns= 1.00c 886 SSE2 :MOVLPD [m64], xmm L: [memory dep.] T: 0.32ns= 1.00c 887 SSE2 :MOVLPD LS pair L: 2.42ns= 7.5c T: 0.09ns= 0.29c 888 SSE2 :MOVHPD xmm, [m64] L: [memory dep.] T: 0.32ns= 1.00c 889 SSE2 :MOVHPD [m64], xmm L: [memory dep.] T: 0.32ns= 1.00c 890 SSE2 :MOVHPD LS pair L: 2.42ns= 7.5c T: 0.14ns= 0.42c 891 SSE2 :MOVAPD xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 892 SSE2 :MOVAPD xmm, [m128] L: [memory dep.] T: 0.16ns= 0.50c 893 SSE2 :MOVAPD [m128], xmm L: [memory dep.] T: 0.32ns= 1.00c 894 SSE2 :MOVAPD LS pair L: 2.21ns= 6.8c T: 0.08ns= 0.26c 895 SSE2 :MOVUPD xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 896 SSE2 :MOVUPD xmm, [m128] L: [memory dep.] T: 0.16ns= 0.50c 897 SSE2 :MOVUPD [m128], xmm L: [memory dep.] T: 0.32ns= 1.00c 898 SSE2 :MOVUPD aligned LS pair L: 2.13ns= 6.6c T: 0.08ns= 0.25c 899 SSE2 :MOVUPD xmm, [m128 + 4] L: [memory dep.] T: 0.16ns= 0.49c 900 SSE2 :MOVUPD [m128 + 4], xmm L: [memory dep.] T: 0.32ns= 1.00c 901 SSE2 :MOVUPD unaligned LS pair L: 1.94ns= 6.0c T: 0.32ns= 1.00c 903 SSE2 :MOVNTPD [m128], xmm L: [memory dep.] T: 1.00ns= 1.00c 904 SSE2 :MOVMSKPD r32, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 905 SSE2 :UNPCKLPD xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 906 SSE2 :UNPCKHPD xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 907 SSE2 :SHUFPD xmm, xmm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 908 SSE2 :COMISD xmm, xmm L: [no true dep.] T: 0.32ns= 1.00c 909 SSE2 :UCOMISD xmm, xmm L: [no true dep.] T: 0.32ns= 1.00c 910 SSE2 :CMPSD xmm, xmm, imm8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 911 SSE2 :CMPPD xmm, xmm, imm8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 912 SSE2 :SUBSD xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 913 SSE2 :SUBPD xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 914 SSE2 :ADDSD xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 915 SSE2 :ADDPD xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 916 SSE2 :MULSD xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 917 SSE2 :MULPD xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 918 SSE2 :MULSD+ADDSD xmm, xmm L: 2.59ns= 8.0c T: 0.38ns= 1.17c 919 SSE2 :MULPD+ADDPD xmm, xmm L: 2.59ns= 8.0c T: 0.38ns= 1.17c 920 SSE2 :MULSD xm1,xm1 ADDSD xm2,xm2 L: 1.62ns= 5.0c T: 0.32ns= 1.00c 921 SSE2 :MULPD xm1,xm1 ADDPD xm2,xm2 L: 1.62ns= 5.0c T: 0.32ns= 1.00c 922 SSE2 :MAXSD xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 923 SSE2 :MAXPD xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 924 SSE2 :MINSD xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 925 SSE2 :MINPD xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 926 SSE2 :ANDNPD xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 927 SSE2 :ANDNPD xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 928 SSE2 :ANDPD xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 929 SSE2 :ANDPD xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 930 SSE2 :ORPD xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 931 SSE2 :ORPD xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 932 SSE2 :XORPD xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 933 SSE2 :XORPD xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 934 SSE2 :DIVSD xmm, xmm L: 7.14ns= 22.1c T: 7.09ns= 21.92c 935 SSE2 :DIVSD (0.0/x) L: 3.26ns= 10.1c T: 3.23ns= 10.00c 936 SSE2 :DIVSD (x/1.0) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 937 SSE2 :DIVSD (x/2.0) L: 3.23ns= 10.0c T: 3.26ns= 10.08c 938 SSE2 :DIVSD (x/0.5) L: 3.23ns= 10.0c T: 3.26ns= 10.08c 939 SSE2 :DIVPD xmm, xmm L: 7.14ns= 22.1c T: 7.09ns= 21.92c 940 SSE2 :DIVPD (0.0/x) L: 3.26ns= 10.1c T: 3.23ns= 10.00c 941 SSE2 :DIVPD (x/1.0) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 942 SSE2 :DIVPD (x/2.0) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 943 SSE2 :DIVPD (x/0.5) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 944 SSE2 :SQRTSD xmm, xmm L: 6.92ns= 21.4c T: 7.11ns= 22.00c 945 SSE2 :SQRTSD (0.0) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 946 SSE2 :SQRTSD (1.0) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 947 SSE2 :SQRTPD xmm, xmm L: 6.92ns= 21.4c T: 7.11ns= 22.00c 948 SSE2 :SQRTPD (0.0) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 949 SSE2 :SQRTPD (1.0) L: 3.23ns= 10.0c T: 3.23ns= 10.00c 950 SSE2 :CVTPI2PD xmm, mm L: [diff. reg. set] T: 0.32ns= 1.00c 951 SSE2 :CVTPD2PI mm, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 952 SSE2 :CVTPD2PI + CVTPI2PD L: 2.59ns= 8.0c T: 0.65ns= 2.00c 953 SSE2 :CVTTPD2PI mm, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 954 SSE2 :CVTTPD2PI + CVTPI2PD L: 2.59ns= 8.0c T: 0.65ns= 2.00c 955 SSE2 :CVTSI2SD xmm, r32 L: [diff. reg. set] T: 0.32ns= 1.00c 956 SSE2 :CVTSD2SI r32, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 957 SSE2 :CVTSD2SI + CVTSI2SD r32 L: 2.59ns= 8.0c T: 0.65ns= 2.00c 958 SSE2 :CVTTSD2SI r32, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 959 SSE2 :CVTTSD2SI + CVTSI2SD r32 L: 2.59ns= 8.0c T: 0.65ns= 2.00c 960 AMD64 :CVTSI2SD xmm, r64 L: [diff. reg. set] T: 0.32ns= 1.00c 961 AMD64 :CVTSD2SI r64, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 962 AMD64 :CVTSD2SI + CVTSI2SD r64 L: 2.59ns= 8.0c T: 0.65ns= 2.00c 963 AMD64 :CVTTSD2SI r64, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 964 AMD64 :CVTTSD2SI + CVTSI2SD r64 L: 2.59ns= 8.0c T: 0.65ns= 2.00c 965 SSE2 :CVTDQ2PD xmm, xmm L: 1.29ns= 4.0c T: 0.32ns= 1.00c 966 SSE2 :CVTPD2DQ xmm, xmm L: 1.29ns= 4.0c T: 0.32ns= 1.00c 967 SSE2 :CVTPD2DQ + CVTDQ2PD L: 2.59ns= 8.0c T: 0.65ns= 2.00c 968 SSE2 :CVTTPD2DQ xmm, xmm L: 1.29ns= 4.0c T: 0.32ns= 1.00c 969 SSE2 :CVTTPD2DQ + CVTDQ2PD L: 2.59ns= 8.0c T: 0.65ns= 2.00c 970 SSE2 :CVTDQ2PS xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 971 SSE2 :CVTPS2DQ xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 972 SSE2 :CVTPS2DQ + CVTDQ2PS L: 1.94ns= 6.0c T: 0.65ns= 2.00c 973 SSE2 :CVTTPS2DQ xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 974 SSE2 :CVTTPS2DQ + CVTDQ2PS L: 1.94ns= 6.0c T: 0.65ns= 2.00c 975 SSE2 :CVTPS2PD xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 976 SSE2 :CVTPD2PS xmm, xmm L: 1.29ns= 4.0c T: 0.32ns= 1.00c 977 SSE2 :CVTPD2PS + CVTPS2PD L: 1.94ns= 6.0c T: 0.65ns= 2.00c 978 SSE2 :CVTSS2SD xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 979 SSE2 :CVTSD2SS xmm, xmm L: 1.29ns= 4.0c T: 0.32ns= 1.00c 980 SSE2 :CVTSD2SS + CVTSS2SD L: 1.94ns= 6.0c T: 0.65ns= 2.00c 981 SSE2 :MOVD r32, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 982 SSE2 :MOVD xmm, r32 L: [diff. reg. set] T: 0.32ns= 1.00c 983 SSE2 :MOVD r32, xmm+MOVD xmm, r32 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 984 AMD64 :MOVD r64, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 985 AMD64 :MOVD xmm, r64 L: [diff. reg. set] T: 0.32ns= 1.00c 986 AMD64 :MOVD r64, xmm+MOVD xmm, r64 L: 0.65ns= 2.0c T: 0.32ns= 1.00c 987 SSE2 :MOVD xmm, [m32] L: [memory dep.] T: 0.16ns= 0.50c 988 SSE2 :MOVD [m32], xmm L: [memory dep.] T: 0.32ns= 1.00c 989 SSE2 :MOVD LS pair L: 2.10ns= 6.5c T: 0.26ns= 0.81c 990 SSE2 :MOVQ xmm, [m64] L: [memory dep.] T: 0.16ns= 0.50c 991 SSE2 :MOVQ [m64], xmm L: [memory dep.] T: 0.32ns= 1.00c 992 SSE2 :MOVQ LS pair L: 2.13ns= 6.6c T: 0.27ns= 0.82c 993 SSE2 :MOVDQ2Q mm, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 994 SSE2 :MOVQ2DQ xmm, mm L: [diff. reg. set] T: 0.11ns= 0.33c 995 SSE2 :MOVDQ2Q + MOVQ2DQ xmm, mm L: 0.65ns= 2.0c T: 0.65ns= 2.00c 996 SSE2 :MOVDQA xmm, xmm L: 0.32ns= 1.0c T: 0.11ns= 0.33c 997 SSE2 :MOVDQA xmm, [m128] L: [memory dep.] T: 0.16ns= 0.50c 998 SSE2 :MOVDQA [m128], xmm L: [memory dep.] T: 0.32ns= 1.00c 999 SSE2 :MOVDQA LS pair L: 2.29ns= 7.1c T: 0.08ns= 0.25c 1000 SSE2 :MOVDQU xmm, xmm L: 0.32ns= 1.0c T: 0.11ns= 0.33c 1001 SSE2 :MOVDQU xmm, [m128] L: [memory dep.] T: 0.16ns= 0.50c 1002 SSE2 :MOVDQU [m128], xmm L: [memory dep.] T: 0.32ns= 1.00c 1003 SSE2 :MOVDQU aligned LS pair L: 2.13ns= 6.6c T: 0.08ns= 0.26c 1004 SSE2 :MOVDQU xmm, [m128 + 4] L: [memory dep.] T: 0.16ns= 0.49c 1005 SSE2 :MOVDQU [m128 + 4], xmm L: [memory dep.] T: 0.32ns= 1.00c 1006 SSE2 :MOVDQU unaligned LS pair L: 1.94ns= 6.0c T: 0.32ns= 1.00c 1007 SSE4.1:MOVNTDQA xmm, [m128] L: [memory dep.] T: 0.52ns= 0.52c 1008 SSE2 :MOVNTDQ [m128], xmm L: [memory dep.] T: 1.00ns= 1.00c 1009 SSE4.1:MOVNTDQA + MOVNTDQ L: 110.76ns=342.6c T: 342.58ns=342.58c 1010 SSE2 :PMOVMSKB r32, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 1011 AMD64 :PMOVMSKB r64, xmm L: [diff. reg. set] T: 0.32ns= 1.00c 1012 SSE2 :MASKMOVDQU xmm, xmm L: [memory dep.] T: 6.00ns= 6.00c 1013 SSE2 :PADDB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1014 SSE2 :PADDW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1015 SSE2 :PADDD xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1016 SSE2 :PADDQ xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1017 SSE2 :PADDSB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1018 SSE2 :PADDSW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1019 SSE2 :PADDUSB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1020 SSE2 :PADDUSW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1021 SSE2 :PSUBB xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1022 SSE2 :PSUBB xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1023 SSE2 :PSUBW xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1024 SSE2 :PSUBW xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1025 SSE2 :PSUBD xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1026 SSE2 :PSUBD xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1027 SSE2 :PSUBQ xmm, xmm L: 0.09ns= 0.3c T: 0.09ns= 0.28c 1028 SSE2 :PSUBQ xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1029 SSE2 :PSUBSB xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1030 SSE2 :PSUBSB xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1031 SSE2 :PSUBSW xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1032 SSE2 :PSUBSW xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1033 SSE2 :PSUBUSB xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1034 SSE2 :PSUBUSB xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1035 SSE2 :PSUBUSW xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1036 SSE2 :PSUBUSW xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1037 SSE2 :PCMPEQB xmm, xmm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 1038 SSE2 :PCMPEQB xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1039 SSE2 :PCMPEQW xmm, xmm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 1040 SSE2 :PCMPEQW xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1041 SSE2 :PCMPEQD xmm, xmm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 1042 SSE2 :PCMPEQD xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1043 SSE4.1:PCMPEQQ xmm, xmm L: 0.16ns= 0.5c T: 0.16ns= 0.50c 1044 SSE4.1:PCMPEQQ xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1045 SSE2 :PCMPGTB xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1046 SSE2 :PCMPGTB xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1047 SSE2 :PCMPGTW xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1048 SSE2 :PCMPGTW xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1049 SSE2 :PCMPGTD xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1050 SSE2 :PCMPGTD xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1051 SSE4.2:PCMPGTQ xmm, xmm L: 0.10ns= 0.3c T: 0.10ns= 0.31c 1052 SSE4.2:PCMPGTQ xmm_1, xmm_2 L: 1.62ns= 5.0c T: 0.30ns= 0.92c 1053 SSE2 :PAND xmm, xmm L: 0.32ns= 1.0c T: 0.11ns= 0.33c 1054 SSE2 :PAND xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 1055 SSE2 :PANDN xmm, xmm L: 0.32ns= 1.0c T: 0.11ns= 0.33c 1056 SSE2 :PANDN xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 1057 SSE2 :POR xmm, xmm L: 0.32ns= 1.0c T: 0.11ns= 0.33c 1058 SSE2 :POR xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 1059 SSE2 :PXOR xmm, xmm L: 0.08ns= 0.3c T: 0.08ns= 0.25c 1060 SSE2 :PXOR xmm_1, xmm_2 L: 0.32ns= 1.0c T: 0.11ns= 0.33c 1061 SSE2 :PMULHW xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1062 SSE2 :PMULHUW xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1063 SSSE3 :PMULHRSW xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1064 SSE2 :PMULLW xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1065 SSE4.1:PMULLD xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1066 SSE4.1:PMULDQ xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1067 SSE2 :PMULUDQ xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1068 SSSE3 :PMADDUBSW xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1069 SSE2 :PMADDWD xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1070 SSE2 :PSLLW xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1071 SSE2 :PSLLW xmm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1072 SSE2 :PSLLD xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1073 SSE2 :PSLLD xmm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1074 SSE2 :PSLLQ xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1075 SSE2 :PSLLQ xmm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1076 SSE2 :PSLLDQ xmm, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1077 SSE2 :PSRAW xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1078 SSE2 :PSRAW xmm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1079 SSE2 :PSRAD xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1080 SSE2 :PSRAD xmm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1081 SSE2 :PSRLW xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1082 SSE2 :PSRLW xmm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1083 SSE2 :PSRLD xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1084 SSE2 :PSRLD xmm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1085 SSE2 :PSRLQ xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1086 SSE2 :PSRLQ xmm, imm8 L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1087 SSE2 :PSRLDQ xmm, imm8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1088 SSE2 :PUNPCKHBW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1089 SSE2 :PUNPCKHWD xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1090 SSE2 :PUNPCKHDQ xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1091 SSE2 :PUNPCKHQDQ xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1092 SSE2 :PUNPCKLBW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1093 SSE2 :PUNPCKLWD xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1094 SSE2 :PUNPCKLDQ xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1095 SSE2 :PUNPCKLQDQ xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1096 SSE2 :PACKSSWB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1097 SSE2 :PACKUSWB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1098 SSE2 :PACKSSDW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1099 SSE4.1:PACKUSDW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1100 SSE2 :PAVGB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1101 SSE2 :PAVGW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1102 SSE4.1:PEXTRB r32, xmm, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 1103 SSE4.1:PINSRB xmm, r32, im8 L: [diff. reg. set] T: 0.35ns= 1.08c 1104 SSE4.1:PEXTRB + PINSRB r32 L: 0.48ns= 1.5c T: 0.48ns= 1.50c 1105 SSE4.1:PEXTRB r64, xmm, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 1106 SSE4.1:PINSRB xmm, r64, im8 L: [diff. reg. set] T: 0.35ns= 1.08c 1107 SSE4.1:PEXTRB + PINSRB r64 L: 0.51ns= 1.6c T: 0.51ns= 1.58c 1108 SSE2 :PEXTRW r32, xmm, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 1109 SSE2 :PINSRW xmm, r32, im8 L: [diff. reg. set] T: 0.35ns= 1.08c 1110 SSE2 :PEXTRW + PINSRW r32 L: 0.51ns= 1.6c T: 0.51ns= 1.58c 1111 AMD64 :PEXTRW r64, xmm, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 1112 AMD64 :PINSRW xmm, r64, im8 L: [diff. reg. set] T: 0.35ns= 1.08c 1113 AMD64 :PEXTRW + PINSRW r64 L: 0.48ns= 1.5c T: 0.48ns= 1.50c 1114 SSE4.1:PEXTRD r32, xmm, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 1115 SSE4.1:PINSRD xmm, r32, im8 L: [diff. reg. set] T: 0.35ns= 1.08c 1116 SSE4.1:PEXTRD + PINSRD r32 L: 0.48ns= 1.5c T: 0.48ns= 1.50c 1117 SSE4.1:PEXTRQ r64, xmm, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 1118 SSE4.1:PINSRQ xmm, r64, im8 L: [diff. reg. set] T: 0.35ns= 1.08c 1119 SSE4.1:PEXTRD + PINSRD r64 L: 0.51ns= 1.6c T: 0.51ns= 1.58c 1120 SSE4.1:EXTRACTPS r32, xmm, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 1121 SSE4.1:INSERTPS xmm, r32, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 1122 SSE4.1:EXTRACTPS + INSERTPS r32 L: 0.65ns= 2.0c T: 0.65ns= 2.00c 1123 SSE4.1:EXTRACTPS r64, xmm, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 1124 SSE4.1:INSERTPS xmm, r64, im8 L: [diff. reg. set] T: 0.32ns= 1.00c 1125 SSE4.1:EXTRACTPS + INSERTPS r64 L: 0.65ns= 2.0c T: 0.65ns= 2.00c 1130 SSE2 :PMAXUB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1131 SSE4.1:PMAXSB xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1132 SSE4.1:PMAXUW xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1133 SSE2 :PMAXSW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1134 SSE4.1:PMAXUD xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1135 SSE4.1:PMAXSD xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1136 SSE2 :PMINUB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1137 SSE4.1:PMINSB xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1138 SSE4.1:PMINUW xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1139 SSE2 :PMINSW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1140 SSE4.1:PMINUD xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1141 SSE4.1:PMINSD xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1142 SSE2 :PSADBW xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1143 SSSE3 :PSHUFB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1144 SSE2 :PSHUFLW xmm, xmm, im8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1145 SSE2 :PSHUFHW xmm, xmm, im8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1146 SSE2 :PSHUFD xmm, xmm, im8 L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1147 SSE3 :ADDSUBPS xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 1148 SSE3 :ADDSUBPD xmm, xmm L: 0.97ns= 3.0c T: 0.32ns= 1.00c 1149 SSE3 :HADDPS xmm, xmm L: 1.62ns= 5.0c T: 0.65ns= 2.00c 1150 SSE3 :HADDPD xmm, xmm L: 1.62ns= 5.0c T: 0.65ns= 2.00c 1151 SSE3 :HSUBPS xmm, xmm L: 1.62ns= 5.0c T: 0.65ns= 2.00c 1152 SSE3 :HSUBPD xmm, xmm L: 1.62ns= 5.0c T: 0.65ns= 2.00c 1153 SSE3 :MOVSLDUP xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1154 SSE3 :MOVSHDUP xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1155 SSE3 :MOVDDUP xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1156 SSE3 :LDDQU xmm, [m128 + 4] L: [memory dep.] T: 0.16ns= 0.49c 1157 SSSE3 :PABSB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1158 SSSE3 :PABSW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1159 SSSE3 :PABSD xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1160 SSSE3 :PALIGNR xmm, xmm, imm8 L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1161 SSSE3 :PHADDD xmm, xmm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 1162 SSSE3 :PHADDW xmm, xmm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 1163 SSSE3 :PHADDSW xmm, xmm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 1164 SSSE3 :PHSUBD xmm, xmm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 1165 SSSE3 :PHSUBW xmm, xmm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 1166 SSSE3 :PHSUBSW xmm, xmm L: 0.65ns= 2.0c T: 0.48ns= 1.50c 1167 SSSE3 :PSIGNB xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1168 SSSE3 :PSIGNW xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1169 SSSE3 :PSIGND xmm, xmm L: 0.32ns= 1.0c T: 0.16ns= 0.50c 1170 SSE4.1:BLENDPS xmm, xmm, imm8 L: 0.32ns= 1.0c T: 0.28ns= 0.88c 1171 SSE4.1:BLENDVPS xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1172 SSE4.1:BLENDPD xmm, xmm, imm8 L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1173 SSE4.1:BLENDVPD xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1174 SSE4.1:PBLENDW xmm, xmm, imm8 L: 0.32ns= 1.0c T: 0.29ns= 0.90c 1175 SSE4.1:PBLENDVB xmm, xmm L: 0.65ns= 2.0c T: 0.32ns= 1.00c 1176 SSE4.1:DPPS xmm, xmm, imm8 L: 3.88ns= 12.0c T: 0.32ns= 1.00c 1177 SSE4.1:DPPD xmm, xmm, imm8 L: 2.91ns= 9.0c T: 0.32ns= 1.00c 1178 SSE4.1:MPSADBW xmm, xmm, imm8 L: 1.97ns= 6.1c T: 0.32ns= 1.00c 1179 SSE4.1:PHMINPOSUW xmm, xmm L: 1.62ns= 5.0c T: 0.32ns= 1.00c 1180 SSE4.1:PMOVSXBW xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1181 SSE4.1:PMOVSXBD xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1182 SSE4.1:PMOVSXBQ xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1183 SSE4.1:PMOVSXWD xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1184 SSE4.1:PMOVSXWQ xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1185 SSE4.1:PMOVSXDQ xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1186 SSE4.1:PMOVZXBW xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1187 SSE4.1:PMOVZXBD xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1188 SSE4.1:PMOVZXBQ xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1189 SSE4.1:PMOVZXWD xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1190 SSE4.1:PMOVZXWQ xmm, xmm L: 0.32ns= 1.0c T: 0.32ns= 1.00c 1191 SSE4.1:PMOVZXDQ xmm, xmm L: 0.32ns= 1.0c T: 0.30ns= 0.92c 1192 SSE4.1:PTEST xmm, xmm L: [no true dep.] T: 0.32ns= 1.00c 1193 SSE4.1:ROUNDSS xmm, xmm, imm8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 1194 SSE4.1:ROUNDPS xmm, xmm, imm8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 1195 SSE4.1:ROUNDSD xmm, xmm, imm8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 1196 SSE4.1:ROUNDPD xmm, xmm, imm8 L: 0.97ns= 3.0c T: 0.32ns= 1.00c 1197 SSE4.2:PCMPESTRI xmm, xmm, imm8 L: 1.29ns= 4.0c T: 1.29ns= 4.00c 1198 SSE4.2:PCMPESTRM xmm, xmm, imm8 L: 1.29ns= 4.0c T: 1.29ns= 4.00c 1199 SSE4.2:PCMPISTRI xmm, xmm, imm8 L: 0.97ns= 3.0c T: 0.97ns= 3.00c 1200 SSE4.2:PCMPISTRM xmm, xmm, imm8 L: 0.97ns= 3.0c T: 0.97ns= 3.00c 1201 CLMUL :PCLMULQDQ xmm, xmm, imm8 L: 4.39ns= 13.6c T: 2.59ns= 8.00c 1202 AESNI :AESENC xmm, xmm L: 2.59ns= 8.0c T: 0.32ns= 1.00c 1203 AESNI :AESENCLAST xmm, xmm L: 2.59ns= 8.0c T: 0.32ns= 1.00c 1204 AESNI :AESDEC xmm, xmm L: 2.59ns= 8.0c T: 0.32ns= 1.00c 1205 AESNI :AESDECLAST xmm, xmm L: 2.59ns= 8.0c T: 0.32ns= 1.00c 1206 AESNI :AESIMC xmm, xmm L: 4.53ns= 14.0c T: 0.65ns= 2.00c 1207 AESNI :AESKEYGEN xmm, xmm, imm8 L: 3.23ns= 10.0c T: 2.59ns= 8.00c